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From: Michael Galea <michaelgalea@ruggedcom.com>
To: linuxppc-embedded@ozlabs.org
Subject: Question on assigning interrupts in a dts
Date: Thu, 12 Jun 2008 10:12:09 -0400	[thread overview]
Message-ID: <48512EB9.3080307@ruggedcom.com> (raw)

Hi All,
     I'm building a dts for a custom 8360 based board.  I'm looking at 
the mpc8360_mds and mpc8360_rdk dts files, trying to figure out how the 
UCCs (and all peripherals in general) got the values of their 
"interrupts" properties chosen.  And is there any relationship between 
the choice of interrupts for ucc1 and the qeic controller..  Can anyone 
point me some docs for this?

             enet0: ucc@2000 {
                 device_type = "network";
                 compatible = "ucc_geth";
                 cell-index = <1>;
                 reg = <0x2000 0x200>;
                 interrupts = <32>;
         ..
             };

              enet1: ucc@3000 {
                 device_type = "network";
                 compatible = "ucc_geth";
                 cell-index = <2>;
                 reg = <0x3000 0x200>;
                 interrupts = <33>;
         ..
             };

             qeic: interrupt-controller@80 {
                 #address-cells = <0>;
                 #interrupt-cells = <1>;
                 compatible = "fsl,qe-ic";
                 interrupt-controller;
                 reg = <0x80 0x80>;
                 big-endian;
                 interrupts = <32 8 33 8>;
                 interrupt-parent = <&ipic>;
             };

Thanks

-- 
Michael Galea

             reply	other threads:[~2008-06-12 14:24 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-06-12 14:12 Michael Galea [this message]
2008-06-12 17:09 ` Question on assigning interrupts in a dts Mike Timmons
2008-06-12 20:41   ` Michael Galea
2008-06-12 17:52 ` Scott Wood

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