[PATCH 0/5] Updates for memory dlpar and dynamic reconfiguration memory

[Nathan Fontenot <nfont@austin.ibm.com>]

The following patchset corrects a couple of issues with memory dlpar and
adds support for the new memory layout in the device tree on the latest Power
hardware and kernels.

On newer hardware and kernels, the device tree has changed so that all
memory appears under the node ibm,dynamic-reconfiguration-memory.  This node
has several properties that describe lmbs, lmb-size and numa affinity.

The ibm,dynamic-memory property is a list of all possible lmbs, where each
list entry contains the base address, drc index, associativity array index
and a set of flags.

The ibm,associativity-lookup-arrays property contains a list of associativity
arrays and the ibm,lmb-size contains the size of the lmbs

For reference, memory was previously represented with a node, of the form
memory@XXXXXXXX, for each lmb assigned the system.  Each of these memory
nodes had properties such as ibm,my-drc-index for the drc index and regs
for the base address and lmb size.

With the new device tree layout, code associated with memory dlpar needs to
be updated to parse the new device tree layout and properly call the memory
hotplug notifier chains.  Additionally, the numa associativity roiutine
called during hotplug add of memory needs a seperate version for parsing the
new device tree layout.

Signed-off-by: Nathan Fontenot <nfont@austin.ibm.com>