From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from az33egw01.freescale.net (az33egw01.freescale.net [192.88.158.102]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "az33egw01.freescale.net", Issuer "Thawte Premium Server CA" (verified OK)) by ozlabs.org (Postfix) with ESMTPS id 001E9DDFD6 for ; Thu, 26 Jun 2008 01:34:48 +1000 (EST) Message-ID: <48626588.8050202@freescale.com> Date: Wed, 25 Jun 2008 10:34:32 -0500 From: Scott Wood MIME-Version: 1.0 To: Kumar Gala Subject: Re: [PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct. References: <20080625040718.028B470296@localhost.localdomain> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1; format=flowed Cc: linuxppc-dev@ozlabs.org, Michael Neuling , Paul Mackerras List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Kumar Gala wrote: >> +/* Macros to workout the correct index for the FPR in the thread >> struct */ >> +#define FPRNUMBER(i) (((i) - PT_FPR0) >> 1) >> +#define FPRHALF(i) (((i) - PT_FPR0) % 2) > > Have you looked at what the compiler spits out here to make sure we > aren't getting a divide? Seems like we could use '& 0x1'. GCC's not *that* dumb. However, you may get some unnecessary sign-twiddling if "i" is signed. -Scott