MPC83xx ipic problem

MPC83xx ipic problem

[André Schwarz]

Scott,

actually I'm having trouble with my PCI interrupts.
We are running 2.6.26-rc6 on a MPC8343 based board.

There are two external PCI devices connected (FPGA + miniPCI socket).
The FPGA is working fine and uses IRQ0 for its PCI_INTA line.

As soon there's a miniPCI module present and the driver loaded (actually=20
an ath5k WiFi module) the system complains after a while :

irq 48: nobody cared
handlers: .... location of the FPGA irq handler
Disabling IRQ #48

-> This is weird since the FPGA isn't working at all and IRQ0 is *not*=20
asserted !

Of course the miniPCI irq is routed to a different pin on the CPU=20
(IRQ1). Having a look at the irq count it's obvious that the WiFi irqs=20
are handled (ath module). The FPGA irq handler is located in the=20
"mvbcdma0" module which is running rock solid without miniPCI present !

mvBL-M7> cat /proc/interrupts
CPU0
16:       1826   IPIC   Level     i2c-mpc
17:          9   IPIC   Level     i2c-mpc
18:        201   IPIC   Level     ath
19:       2896   IPIC   Level     serial
21:          0   IPIC   Level     mpc83xx_spi
32:          2   IPIC   Level     enet_tx
33:        257   IPIC   Level     enet_rx
34:          0   IPIC   Level     enet_error
48:     100000   IPIC   Level     mvbcdma0
BAD:          0


The irq mapping insides the dts :

interrupt-map =3D <0x5800 0 0 1 &ipic 0x30 0x8      -> FPGA @ IRQ0
                  0x6000 0 0 1 &ipic 0x11 0x8      -> miniPCI INTA @ IRQ1
                  0x6000 0 0 2 &ipic 0x11 0x8>;    -> miniPCI INTB @ IRQ1

Is it legal to use a single irq pin twice ?
After all the ath5k doesn't use/assert the INTB line at all ...


If I do all the above after removing the FPGA module and releasing irq48=20
the system doesn't complain anymore ... but hangs after a while with the=20
IRQ1 line being unserviced.


What do you think ?
Any hints ?

Am I doing anything obviously wrong ?



regards,
Andr=E9

MATRIX VISION GmbH, Talstra=DFe 16, DE-71570 Oppenweiler  - Registergeric=
ht: Amtsgericht Stuttgart, HRB 271090
Gesch=E4ftsf=FChrer: Gerhard Thullner, Werner Armingeon, Uwe Furtner

Re: MPC83xx ipic problem

[Segher Boessenkool]

> interrupt-map = <0x5800 0 0 1 &ipic 0x30 0x8      -> FPGA @ IRQ0
>                  0x6000 0 0 1 &ipic 0x11 0x8      -> miniPCI INTA @ 
> IRQ1
>                  0x6000 0 0 2 &ipic 0x11 0x8>;    -> miniPCI INTB @ 
> IRQ1
>
> Is it legal to use a single irq pin twice ?

The device tree simply describes the hardware; if the hardware
connects both INTXs to the same IPIC interrupt pin, then it is
correct.  You'll have to ask a hardware designer whether it is
okay to just tie the two lines together; I believe it is, for
PCI, but you better ask someone who really knows :-)


Segher

Re: MPC83xx ipic problem

[André Schwarz]

Segher,

actually I'm the hardware designer ... :-) .... having trouble with=20
software.

The outputs are open-drain and can be connected (wired-or) together.
Otherwise "shared irq" wouldn't be possible that easy.


cheers,
Andr=E9




Segher Boessenkool wrote:
>> interrupt-map =3D <0x5800 0 0 1 &ipic 0x30 0x8      -> FPGA @ IRQ0
>>                  0x6000 0 0 1 &ipic 0x11 0x8      -> miniPCI INTA @ IR=
Q1
>>                  0x6000 0 0 2 &ipic 0x11 0x8>;    -> miniPCI INTB @ IR=
Q1
>>
>> Is it legal to use a single irq pin twice ?
>
> The device tree simply describes the hardware; if the hardware
> connects both INTXs to the same IPIC interrupt pin, then it is
> correct.  You'll have to ask a hardware designer whether it is
> okay to just tie the two lines together; I believe it is, for
> PCI, but you better ask someone who really knows :-)
>
>
> Segher
>


MATRIX VISION GmbH, Talstra=DFe 16, DE-71570 Oppenweiler  - Registergeric=
ht: Amtsgericht Stuttgart, HRB 271090
Gesch=E4ftsf=FChrer: Gerhard Thullner, Werner Armingeon, Uwe Furtner

Re: MPC83xx ipic problem

[Scott Wood]

André Schwarz wrote:
> There are two external PCI devices connected (FPGA + miniPCI socket).
> The FPGA is working fine and uses IRQ0 for its PCI_INTA line.
> 
> As soon there's a miniPCI module present and the driver loaded (actually 
> an ath5k WiFi module) the system complains after a while :
> 
> irq 48: nobody cared
> handlers: .... location of the FPGA irq handler
> Disabling IRQ #48
> 
> -> This is weird since the FPGA isn't working at all and IRQ0 is *not* 
> asserted !

Are you *sure* that IRQ0 isn't asserted?  The IPIC seems to think it is.

> Of course the miniPCI irq is routed to a different pin on the CPU 
> (IRQ1).

Perhaps the board wiring is incorrect?

> interrupt-map = <0x5800 0 0 1 &ipic 0x30 0x8      -> FPGA @ IRQ0
>                  0x6000 0 0 1 &ipic 0x11 0x8      -> miniPCI INTA @ IRQ1
>                  0x6000 0 0 2 &ipic 0x11 0x8>;    -> miniPCI INTB @ IRQ1
> 
> Is it legal to use a single irq pin twice ?

Yes.

-Scott

Re: MPC83xx ipic problem

[André Schwarz]

Scott,

thanks for your reply.

Honestly I don't think the board wiring is incorrect.
FPGA goes to IRQ0 and miniPCI is wired to IRQ1.

Maybe there's a crosstalk problem since the pull-up resistors are=20
packaged inside an array ... I'll check this.


regards,
Andr=C3=A9


Scott Wood schrieb:
> Andr=C3=A9 Schwarz wrote:
>> There are two external PCI devices connected (FPGA + miniPCI socket).
>> The FPGA is working fine and uses IRQ0 for its PCI_INTA line.
>>
>> As soon there's a miniPCI module present and the driver loaded=20
>> (actually an ath5k WiFi module) the system complains after a while :
>>
>> irq 48: nobody cared
>> handlers: .... location of the FPGA irq handler
>> Disabling IRQ #48
>>
>> -> This is weird since the FPGA isn't working at all and IRQ0 is *not*=
=20
>> asserted !
>=20
> Are you *sure* that IRQ0 isn't asserted?  The IPIC seems to think it is=
.
>=20
>> Of course the miniPCI irq is routed to a different pin on the CPU (IRQ=
1).
>=20
> Perhaps the board wiring is incorrect?
>=20
>> interrupt-map =3D <0x5800 0 0 1 &ipic 0x30 0x8      -> FPGA @ IRQ0
>>                  0x6000 0 0 1 &ipic 0x11 0x8      -> miniPCI INTA @ IR=
Q1
>>                  0x6000 0 0 2 &ipic 0x11 0x8>;    -> miniPCI INTB @ IR=
Q1
>>
>> Is it legal to use a single irq pin twice ?
>=20
> Yes.
>=20
> -Scott
>=20
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> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev


MATRIX VISION GmbH, Talstra=DFe 16, DE-71570 Oppenweiler  - Registergeric=
ht: Amtsgericht Stuttgart, HRB 271090
Gesch=E4ftsf=FChrer: Gerhard Thullner, Werner Armingeon, Uwe Furtner