[PATCH] Add PPC_FEATURE_PMU_COMPAT

[PATCH] Add PPC_FEATURE_PMU_COMPAT

[Nathan Lynch]

Beginning with Power6, there is a set of 32 PMU events which is
compatible across POWER processor lines.  PPC_FEATURE_PMU_COMPAT
indicates support for this subset.

Signed-off-by: Nathan Lynch <ntl@pobox.com>
---
 arch/powerpc/kernel/cputable.c |    4 ++--
 include/asm-powerpc/cputable.h |    1 +
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 817cea1..a9c90be 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -70,10 +70,10 @@ extern void __restore_cpu_power7(void);
 				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
 #define COMMON_USER_POWER6	(COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
 				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
-				 PPC_FEATURE_TRUE_LE)
+				 PPC_FEATURE_TRUE_LE | PPC_FEATURE_PMU_COMPAT)
 #define COMMON_USER_POWER7	(COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
 				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
-				 PPC_FEATURE_TRUE_LE)
+				 PPC_FEATURE_TRUE_LE | PPC_FEATURE_PMU_COMPAT)
 #define COMMON_USER_PA6T	(COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
 				 PPC_FEATURE_TRUE_LE | \
 				 PPC_FEATURE_HAS_ALTIVEC_COMP)
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index 4e4491c..a9c1de3 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -26,6 +26,7 @@
 #define PPC_FEATURE_POWER6_EXT		0x00000200
 #define PPC_FEATURE_ARCH_2_06		0x00000100
 #define PPC_FEATURE_HAS_VSX		0x00000080
+#define PPC_FEATURE_PMU_COMPAT		0x00000040
 
 #define PPC_FEATURE_TRUE_LE		0x00000002
 #define PPC_FEATURE_PPC_LE		0x00000001
-- 
1.5.5.1

Re: [PATCH] Add PPC_FEATURE_PMU_COMPAT

[Kumar Gala]

On Jul 3, 2008, at 6:20 PM, Nathan Lynch wrote:

> Beginning with Power6, there is a set of 32 PMU events which is
> compatible across POWER processor lines.  PPC_FEATURE_PMU_COMPAT
> indicates support for this subset.
>
> Signed-off-by: Nathan Lynch <ntl@pobox.com>
> ---
> arch/powerpc/kernel/cputable.c |    4 ++--
> include/asm-powerpc/cputable.h |    1 +
> 2 files changed, 3 insertions(+), 2 deletions(-)

Can you explain what these PMU events are a bit further?

- k

Re: [PATCH] Add PPC_FEATURE_PMU_COMPAT

[Nathan Lynch]

Kumar Gala wrote:
>
> On Jul 3, 2008, at 6:20 PM, Nathan Lynch wrote:
>
>> Beginning with Power6, there is a set of 32 PMU events which is
>> compatible across POWER processor lines.  PPC_FEATURE_PMU_COMPAT
>> indicates support for this subset.
>>
>> Signed-off-by: Nathan Lynch <ntl@pobox.com>
>> ---
>> arch/powerpc/kernel/cputable.c |    4 ++--
>> include/asm-powerpc/cputable.h |    1 +
>> 2 files changed, 3 insertions(+), 2 deletions(-)
>
> Can you explain what these PMU events are a bit further?

Maynard, can you help out here...?  :)

Re: [PATCH] Add PPC_FEATURE_PMU_COMPAT

[Maynard Johnson]

Nathan Lynch wrote:
> Kumar Gala wrote:
>   
>> On Jul 3, 2008, at 6:20 PM, Nathan Lynch wrote:
>>
>>     
>>> Beginning with Power6, there is a set of 32 PMU events which is
>>> compatible across POWER processor lines.  PPC_FEATURE_PMU_COMPAT
>>> indicates support for this subset.
>>>
>>> Signed-off-by: Nathan Lynch <ntl@pobox.com>
>>> ---
>>> arch/powerpc/kernel/cputable.c |    4 ++--
>>> include/asm-powerpc/cputable.h |    1 +
>>> 2 files changed, 3 insertions(+), 2 deletions(-)
>>>       
>> Can you explain what these PMU events are a bit further?
>>     
>
> Maynard, can you help out here...?  :)
>   
As of POWER6, a set of 32 common events were defined that must be
supported on all future POWER processors -- aka "PMU compat set".  The
main impetus for this compat set is the need to support partition
migration, especially from processor P(n) to processor P(n+1), where
performance software that's running in the new partition may not be
knowledgeable about processor P(n+1).  If a performance tool determines
it does not support the physical processor, but is told (via the
PPC_FEATURE_PMU_COMPAT bit) that the processor supports the notion of
the PMU compat set, then the performance tool can surface just those
events to the user of the tool.

Hope that helps.

-Maynard

Re: [PATCH] Add PPC_FEATURE_PMU_COMPAT

[Olof Johansson]

On Jul 3, 2008, at 6:20 PM, Nathan Lynch wrote:

> Beginning with Power6, there is a set of 32 PMU events which is
> compatible across POWER processor lines.  PPC_FEATURE_PMU_COMPAT
> indicates support for this subset.

The PMU isn't, as far as I know, part of the architecture, it's up to  
each implementation to do as it pleases. Right? So this should  
probably be named less generic.


-Olof

Re: [PATCH] Add PPC_FEATURE_PMU_COMPAT

[Nathan Lynch]

Olof Johansson wrote:
> On Jul 3, 2008, at 6:20 PM, Nathan Lynch wrote:
>
>> Beginning with Power6, there is a set of 32 PMU events which is
>> compatible across POWER processor lines.  PPC_FEATURE_PMU_COMPAT
>> indicates support for this subset.
>
> The PMU isn't, as far as I know, part of the architecture, it's up to  
> each implementation to do as it pleases. Right? So this should probably 
> be named less generic.

Yeah, you're right.  Will change it to PSERIES_PMU_COMPAT or similar.

[PATCH v2] Add PPC_FEATURE_PSERIES_PMU_COMPAT

[Nathan Lynch]

Background from Maynard Johnson:
As of POWER6, a set of 32 common events is defined that must be
supported on all future POWER processors.  The main impetus for this
compat set is the need to support partition migration, especially from
processor P(n) to processor P(n+1), where performance software that's
running in the new partition may not be knowledgeable about processor
P(n+1).  If a performance tool determines it does not support the
physical processor, but is told (via the PPC_FEATURE_PSERIES_PMU_COMPAT
bit) that the processor supports the notion of the PMU compat set,
then the performance tool can surface just those events to the user
of the tool.

PPC_FEATURE_PSERIES_PMU_COMPAT indicates that the PMU supports at
least this basic subset of events which is compatible across POWER
processor lines.

Signed-off-by: Nathan Lynch <ntl@pobox.com>
---

Changes since v1:
- make name of feature bit less generic
- provide more complete changelog

 arch/powerpc/kernel/cputable.c |    6 ++++--
 include/asm-powerpc/cputable.h |    1 +
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 817cea1..c4eb377 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -70,10 +70,12 @@ extern void __restore_cpu_power7(void);
 				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
 #define COMMON_USER_POWER6	(COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
 				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
-				 PPC_FEATURE_TRUE_LE)
+				 PPC_FEATURE_TRUE_LE | \
+				 PPC_FEATURE_PSERIES_PMU_COMPAT)
 #define COMMON_USER_POWER7	(COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
 				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
-				 PPC_FEATURE_TRUE_LE)
+				 PPC_FEATURE_TRUE_LE | \
+				 PPC_FEATURE_PSERIES_PMU_COMPAT)
 #define COMMON_USER_PA6T	(COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
 				 PPC_FEATURE_TRUE_LE | \
 				 PPC_FEATURE_HAS_ALTIVEC_COMP)
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index 3171ac9..d1492a2 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -26,6 +26,7 @@
 #define PPC_FEATURE_POWER6_EXT		0x00000200
 #define PPC_FEATURE_ARCH_2_06		0x00000100
 #define PPC_FEATURE_HAS_VSX		0x00000080
+#define PPC_FEATURE_PSERIES_PMU_COMPAT	0x00000040
 
 #define PPC_FEATURE_TRUE_LE		0x00000002
 #define PPC_FEATURE_PPC_LE		0x00000001
-- 
1.5.6.2

Re: [PATCH v2] Add PPC_FEATURE_PSERIES_PMU_COMPAT

[Kumar Gala]

On Jul 8, 2008, at 3:01 PM, Nathan Lynch wrote:

> Background from Maynard Johnson:
> As of POWER6, a set of 32 common events is defined that must be
> supported on all future POWER processors.  The main impetus for this
> compat set is the need to support partition migration, especially from
> processor P(n) to processor P(n+1), where performance software that's
> running in the new partition may not be knowledgeable about processor
> P(n+1).  If a performance tool determines it does not support the
> physical processor, but is told (via the  
> PPC_FEATURE_PSERIES_PMU_COMPAT
> bit) that the processor supports the notion of the PMU compat set,
> then the performance tool can surface just those events to the user
> of the tool.
>
> PPC_FEATURE_PSERIES_PMU_COMPAT indicates that the PMU supports at
> least this basic subset of events which is compatible across POWER
> processor lines.
>
> Signed-off-by: Nathan Lynch <ntl@pobox.com>
> ---

So is PMU here performance monitor unit?  I think that was part of my  
confusion earlier.  I was thinking Power Mgmt Unit (like on Apple HW).

I hate make the name longer, but PPC_FEATURE_PSERIES_PERFMON_COMPAT  
would probably be clearer.

- k

Re: [PATCH v2] Add PPC_FEATURE_PSERIES_PMU_COMPAT

[Nathan Lynch]

Kumar Gala wrote:
>
> So is PMU here performance monitor unit?  I think that was part of my  
> confusion earlier.  I was thinking Power Mgmt Unit (like on Apple HW).

Yes, PMU means performance monitor unit in the context of pseries.


> I hate make the name longer, but PPC_FEATURE_PSERIES_PERFMON_COMPAT  
> would probably be clearer.

Okay.

[PATCH v3] Add PPC_FEATURE_PSERIES_PERFMON_COMPAT

[Nathan Lynch]

Background from Maynard Johnson:
As of POWER6, a set of 32 common events is defined that must be
supported on all future POWER processors.  The main impetus for this
compat set is the need to support partition migration, especially from
processor P(n) to processor P(n+1), where performance software that's
running in the new partition may not be knowledgeable about processor
P(n+1).  If a performance tool determines it does not support the
physical processor, but is told (via the
PPC_FEATURE_PSERIES_PERFMON_COMPAT bit) that the processor supports
the notion of the PMU compat set, then the performance tool can
surface just those events to the user of the tool.

PPC_FEATURE_PSERIES_PERFMON_COMPAT indicates that the PMU supports at
least this basic subset of events which is compatible across POWER
processor lines.

Signed-off-by: Nathan Lynch <ntl@pobox.com>
---

Changes since v2:
- Further disambiguated name of feature bit (PMU -> PERFMON)

Changes since v1:
- make name of feature bit less generic
- provide more complete changelog

 arch/powerpc/kernel/cputable.c |    6 ++++--
 include/asm-powerpc/cputable.h |    3 +++
 2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 817cea1..02088b0 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -70,10 +70,12 @@ extern void __restore_cpu_power7(void);
 				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
 #define COMMON_USER_POWER6	(COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
 				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
-				 PPC_FEATURE_TRUE_LE)
+				 PPC_FEATURE_TRUE_LE | \
+				 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
 #define COMMON_USER_POWER7	(COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
 				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
-				 PPC_FEATURE_TRUE_LE)
+				 PPC_FEATURE_TRUE_LE | \
+				 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
 #define COMMON_USER_PA6T	(COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
 				 PPC_FEATURE_TRUE_LE | \
 				 PPC_FEATURE_HAS_ALTIVEC_COMP)
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index 3171ac9..58d4281 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -27,6 +27,9 @@
 #define PPC_FEATURE_ARCH_2_06		0x00000100
 #define PPC_FEATURE_HAS_VSX		0x00000080
 
+#define PPC_FEATURE_PSERIES_PERFMON_COMPAT \
+					0x00000040
+
 #define PPC_FEATURE_TRUE_LE		0x00000002
 #define PPC_FEATURE_PPC_LE		0x00000001
 
-- 
1.5.6.2