From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Message-ID: <48922273.6070801@freescale.com> Date: Thu, 31 Jul 2008 15:37:07 -0500 From: Timur Tabi MIME-Version: 1.0 To: Grant Likely Subject: Re: [PATCH] powerpc: i2c-mpc: make speed registers configurable via FDT References: <4889EFFE.2070201@grandegger.com> <489200B6.9060906@freescale.com> <20080731182810.GB29097@secretlab.ca> <48920607.5040606@freescale.com> <48921187.1090101@grandegger.com> <48921179.1080403@freescale.com> <48921888.3020900@grandegger.com> <48921954.4020103@freescale.com> <48921DED.6010403@grandegger.com> <9e4733910807311332q611b43b3y26f64b5269ccb657@mail.gmail.com> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1 Cc: Scott Wood , Linuxppc-dev@ozlabs.org, Linux I2C List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Grant Likely wrote: > How is the divider controlled? Is it a fixed property of the SoC? Yes. The divider is either 1, 2, or 3, and the only way to know which one it is is to look up the specific SOC model number. And depending on the SOC model, there may also be a register that needs to be looked up. > a > shared register setting? or a register setting within the i2c device? The I2C device itself has no idea what the divider is. It only sees the result of the divider. -- Timur Tabi Linux kernel developer at Freescale