cache model of ppc

cache model of ppc

[Felix Schmidt]

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Dear,

I some questions about the PowerPC cache model.

How many caches are there?
How many caches are in multi-core systems? do you have a L1 cache per
cpu and one shared L2? or is there a victim L3 cache?

can you tell me something about the path through the cache?
for example I look up for data in L1, but this was a miss. Then i look
up in L2 this was also a miss. but the date will be in another L1
cache of another cpu. Is there a 1.5 or 2.5 hit?

can you help me please?
this is for my bachelorthesis

thanks a lot

felix
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Re: cache model of ppc

[Josh Boyer]

On Wed, 2008-08-20 at 17:30 +0200, Felix Schmidt wrote:
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>  
> Dear,
> 
> I some questions about the PowerPC cache model.

It depends greatly on the core, chip, and cache used.  That varies
widely across the PPC universe.

josh

Re: cache model of ppc

[Scott Wood]

On Wed, Aug 20, 2008 at 05:30:21PM +0200, Felix Schmidt wrote:
> I some questions about the PowerPC cache model.
> 
> How many caches are there?
> How many caches are in multi-core systems? do you have a L1 cache per
> cpu and one shared L2? or is there a victim L3 cache?
> 
> can you tell me something about the path through the cache?
> for example I look up for data in L1, but this was a miss. Then i look
> up in L2 this was also a miss. but the date will be in another L1
> cache of another cpu. Is there a 1.5 or 2.5 hit?

This is all dependent on the particular CPU you're talking about, and
should be described in its manual.

-Scott