From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from az33egw02.freescale.net (az33egw02.freescale.net [192.88.158.103]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "az33egw02.freescale.net", Issuer "Thawte Premium Server CA" (verified OK)) by ozlabs.org (Postfix) with ESMTPS id 8D6FCDDF01 for ; Wed, 1 Oct 2008 02:54:31 +1000 (EST) Message-ID: <48E2589D.8090406@freescale.com> Date: Tue, 30 Sep 2008 11:49:33 -0500 From: Scott Wood MIME-Version: 1.0 To: embedded Subject: Re: FCC1 failing on large packet PINGS, while FCC2 is successful References: <48E0E981.60703@freescale.com> In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Cc: linuxppc-embedded@ozlabs.org List-Id: Linux on Embedded PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , embedded wrote: > Actually, it may have been a simple fix. Looking at the clocks. We > noticed something a little awry; Just rechecking the RM and the code > we found that within ep8248.c, the clock setup code had the RX and TX > clocks flipped. > > FCC1 RX CLK should be Clock 10 > FCC1 TX CLK should be Clock 11 D'oh! Thanks for finding that. > in: arch/powerpc/platforms/82xx/ep8248.c > static void __init init_ioports(void) > > - cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK11, CPM_CLK_RX); > - cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_TX); > > + cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_RX); > + cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK11, CPM_CLK_TX); Acked-by: Scott Wood Post to linuxppc-dev@ozlabs.org and galak@kernel.crashing.org with a Signed-off-by. -Scott