From: Michael Ellerman <patch-notifications@ellerman.id.au>
To: Christophe Leroy <christophe.leroy@c-s.fr>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Paul Mackerras <paulus@samba.org>
Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] powerpc/8xx: Fix clearing of bits 20-23 in ITLB miss
Date: Wed, 19 Feb 2020 23:39:55 +1100 (AEDT) [thread overview]
Message-ID: <48My3d1z1Vz9sST@ozlabs.org> (raw)
In-Reply-To: <4f70c2778163affce8508a210f65d140e84524b4.1581272050.git.christophe.leroy@c-s.fr>
On Sun, 2020-02-09 at 18:14:42 UTC, Christophe Leroy wrote:
> In ITLB miss handled the line supposed to clear bits 20-23 on the
> L2 ITLB entry is buggy and does indeed nothing, leading to undefined
> value which could allow execution when it shouldn't.
>
> Properly do the clearing with the relevant instruction.
>
> Fixes: 74fabcadfd43 ("powerpc/8xx: don't use r12/SPRN_SPRG_SCRATCH2 in TLB Miss handlers")
> Cc: stable@vger.kernel.org
> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Applied to powerpc fixes, thanks.
https://git.kernel.org/powerpc/c/a4031afb9d10d97f4d0285844abbc0ab04245304
cheers
next prev parent reply other threads:[~2020-02-19 12:52 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-09 18:14 [PATCH] powerpc/8xx: Fix clearing of bits 20-23 in ITLB miss Christophe Leroy
2020-02-15 6:28 ` Leonardo Bras
2020-02-15 10:17 ` Christophe Leroy
2020-02-17 14:10 ` Leonardo Bras
2020-02-19 12:39 ` Michael Ellerman [this message]
-- strict thread matches above, loose matches on Subject: below --
2020-02-11 4:28 Leonardo Bras
2020-02-20 21:53 ` Leonardo Bras
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