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Mon, 6 Apr 2020 20:18:35 +0200 (CEST) X-Virus-Scanned: amavisd-new at c-s.fr Received: from messagerie.si.c-s.fr ([127.0.0.1]) by localhost (messagerie.si.c-s.fr [127.0.0.1]) (amavisd-new, port 10023) with ESMTP id fDH1qkHOVEY2; Mon, 6 Apr 2020 20:18:35 +0200 (CEST) Received: from [192.168.4.90] (unknown [192.168.4.90]) by messagerie.si.c-s.fr (Postfix) with ESMTP id BF4838B775; Mon, 6 Apr 2020 20:18:34 +0200 (CEST) Subject: Re: [RFC PATCH v2 12/13] powerpc/kernel: Do not inconditionally save non volatile registers on system call To: Nicholas Piggin , Benjamin Herrenschmidt , Michael Ellerman , msuchanek@suse.de, Paul Mackerras References: <029e1064b1ad738785718221ea468c9cfc282457.1586108649.git.christophe.leroy@c-s.fr> <4ef6d617cfd34e09e9bf5a456b2e0b6d2a8a3c96.1586108649.git.christophe.leroy@c-s.fr> <1586135554.pnqaj0giue.astroid@bobo.none> From: Christophe Leroy Message-ID: <48d3e2e5-318f-011e-a59b-ec89bd7b76d2@c-s.fr> Date: Mon, 6 Apr 2020 20:18:29 +0200 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.6.0 MIME-Version: 1.0 In-Reply-To: <1586135554.pnqaj0giue.astroid@bobo.none> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: fr Content-Transfer-Encoding: 8bit X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Le 06/04/2020 à 03:25, Nicholas Piggin a écrit : > Christophe Leroy's on April 6, 2020 3:44 am: >> Before : 347 cycles on null_syscall >> After : 327 cycles on null_syscall > > The problem I had doing this is that signal delivery wnats full regs, > and you don't know if you have a signal pending ahead of time if you > have interrupts enabled. > > I began to try bailing out back to asm to save nvgprs and call again. > I think that can be made to work, but it is more complication in asm, > and I soon found that 64s CPUs don't care about NVGPRs too much so it's > nice to get rid of the !fullregs state. I tried a new way in v3, please have a look. I split syscall_exit_prepare() in 3 parts and the result is unexpected: it is better than before the series (307 cycles now versus 311 cycles with full ASM syscall entry/exit). > > Possibly another approach would be to leave interrupts disabled for the > case where you have no work to do. You could create a small > syscall_exit_prepare_nowork fastpath for that case for 32-bit, perhaps? > > Thanks, > Nick > Christophe