MPC8349 DMA

MPC8349 DMA

[jay_chen]

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Hi,
 
I am using 2.6.14.5 and MPC8349.
I got some DMA problems with PCI devices.
So, I tried to understand the DMA stuff of linux.
 
I have one question about cache coherency.
In dma-mapping.h, I found some functions are defined as NULL.
For example:
#define dma_cache_inv(_start,_size)  do { } while (0)
#define dma_cache_wback(_start,_size)  do { } while (0)
#define dma_cache_wback_inv(_start,_size) do { } while (0)
 
#define __dma_alloc_coherent(gfp, size, handle) NULL
#define __dma_free_coherent(size, addr)  do { } while (0)
#define __dma_sync(addr, size, rw)  do { } while (0)
#define __dma_sync_page(pg, off, sz, rw) do { } while (0)

Does this mean that I don't need to take care of cache coherency in MPC83xx
platform?
So, I could use any range of memory for DMA transferring and the hardware
will take care of the cache coherency for me?
 
Thanks a lot.
 
                                    Jay Chen.
 

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Re: MPC8349 DMA

[Scott Wood]

jay_chen wrote:
> I am using 2.6.14.5 and MPC8349.
> I got some DMA problems with PCI devices.
> So, I tried to understand the DMA stuff of linux.

That's very old; have you tried the latest kernel?

> I have one question about cache coherency.
> In dma-mapping.h, I found some functions are defined as NULL.
> For example:
> #define dma_cache_inv(_start,_size)  do { } while (0)
> #define dma_cache_wback(_start,_size)  do { } while (0)
> #define dma_cache_wback_inv(_start,_size) do { } while (0)
>  
> #define __dma_alloc_coherent(gfp, size, handle) NULL
> #define __dma_free_coherent(size, addr)  do { } while (0)
> #define __dma_sync(addr, size, rw)  do { } while (0)
> #define __dma_sync_page(pg, off, sz, rw) do { } while (0)
> Does this mean that I don't need to take care of cache coherency in 
> MPC83xx platform?
> So, I could use any range of memory for DMA transferring and the 
> hardware will take care of the cache coherency for me?

Yes, however it's still a good idea to call the DMA functions in case 
the code gets run on hardware that doesn't have coherent DMA, or that 
needs special DMA mapping for highmem.

Make sure that the PCI bridge is configured to snoop, and that you map 
your memory as coherence-required (normally not necessary on 
uniprocessor, but there's some weirdness in the 82xx/83xx PCI controller 
that requires it).

-Scott

Re: MPC8349 DMA

[jay_chen]

Thanks for your help.
Could you give some hints about how to  "map your memory as
coherence-required"?

                Jay Chen...

-----Original Message-----
From: linuxppc-embedded-bounces+jay_chen=alphanetworks.com@ozlabs.org
[mailto:linuxppc-embedded-bounces+jay_chen=alphanetworks.com@ozlabs.org] 
Sent: Wednesday, November 12, 2008 2:19 AM
To: jay_chen
Cc: linuxppc-embedded@ozlabs.org
Subject: [Spam Mail] Re: MPC8349 DMA

jay_chen wrote:
> I am using 2.6.14.5 and MPC8349.
> I got some DMA problems with PCI devices.
> So, I tried to understand the DMA stuff of linux.

That's very old; have you tried the latest kernel?

> I have one question about cache coherency.
> In dma-mapping.h, I found some functions are defined as NULL.
> For example:
> #define dma_cache_inv(_start,_size)  do { } while (0) #define 
> dma_cache_wback(_start,_size)  do { } while (0) #define 
> dma_cache_wback_inv(_start,_size) do { } while (0)
>  
> #define __dma_alloc_coherent(gfp, size, handle) NULL #define 
> __dma_free_coherent(size, addr)  do { } while (0) #define 
> __dma_sync(addr, size, rw)  do { } while (0) #define 
> __dma_sync_page(pg, off, sz, rw) do { } while (0) Does this mean that 
> I don't need to take care of cache coherency in MPC83xx platform?
> So, I could use any range of memory for DMA transferring and the 
> hardware will take care of the cache coherency for me?

Yes, however it's still a good idea to call the DMA functions in case the
code gets run on hardware that doesn't have coherent DMA, or that needs
special DMA mapping for highmem.

Make sure that the PCI bridge is configured to snoop, and that you map your
memory as coherence-required (normally not necessary on uniprocessor, but
there's some weirdness in the 82xx/83xx PCI controller that requires it).

-Scott

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Re: MPC8349 DMA

[Scott Wood]

jay_chen wrote:
> Thanks for your help.
> Could you give some hints about how to  "map your memory as
> coherence-required"?

The M bit needs to be set in the BATs and PTEs.  Current kernels do 
this; I don't know about really old ones such as 2.6.14.

-Scott