From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.9]) by ozlabs.org (Postfix) with ESMTP id 8D1BEDDDA5 for ; Thu, 26 Mar 2009 00:43:35 +1100 (EST) Message-ID: <49CA3503.5040006@grandegger.com> Date: Wed, 25 Mar 2009 14:43:31 +0100 From: Wolfgang Grandegger MIME-Version: 1.0 To: Grant Likely Subject: Re: [PATCH v3 1/4] NAND: FSL-UPM: add multi chip support References: <1237975701-23201-1-git-send-email-wg@grandegger.com> <1237975701-23201-2-git-send-email-wg@grandegger.com> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1 Cc: linuxppc-dev@ozlabs.org, devicetree-discuss list , linux-mtd@lists.infradead.org List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Grant Likely wrote: > On Wed, Mar 25, 2009 at 7:31 AM, Grant Likely wrote: >> On Wed, Mar 25, 2009 at 4:08 AM, Wolfgang Grandegger wrote: >>> This patch adds support for multi-chip NAND devices to the FSL-UPM >>> driver. This requires support for multiple GPIOs for the RNB pins. >>> The NAND chips are selected through address lines defined by the >>> FDT property "chip-offset". >>> >>> Signed-off-by: Wolfgang Grandegger >> Hi Wolfgang, >> >> Can you please send a sample device tree snippit for this and add >> documentation updates to your patch for the extended binding? > > Oh, and cc: devicetree-discuss@ozlabs.org in your next posting. OK, does patch 3/4 not already contain what you are looking for? See: http://ozlabs.org/pipermail/linuxppc-dev/2009-March/069787.html I separated it from the NAND patches because they go through the MTD maintainer(s). BTW: did you have a chance to look into the following RFC on I2C bus speed setting? http://ozlabs.org/pipermail/linuxppc-dev/2009-March/069489.html Thanks, Wolfgang.