From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from thsmsgxrt13p.thalesgroup.com (thsmsgxrt13p.thalesgroup.com [192.54.144.136]) by ozlabs.org (Postfix) with ESMTP id 1B278DDEDA for ; Wed, 22 Apr 2009 19:10:53 +1000 (EST) Received: from thsmsgirt26p.corp.thales (unknown [10.33.231.4]) by thsmsgxrt13p.thalesgroup.com (Postfix) with ESMTP id 71C54360D7E for ; Wed, 22 Apr 2009 11:10:50 +0200 (CEST) Received: from thsmsgiav11p.corp.thales (10.33.231.31) by thsmsgirt26p.corp.thales (8.5.103) id 4991986400746A8C for linuxppc-dev@ozlabs.org; Wed, 22 Apr 2009 11:10:50 +0200 Received: from vpsms001.fr.thav.thales (unknown [10.33.12.35]) by thsmsgirt11p.corp.thales (Postfix) with ESMTP id 48C09598052 for ; Wed, 22 Apr 2009 11:10:50 +0200 (CEST) Received: from vpspms02.val.fr.thav.thales (128.1.6.82) by vpsms001.fr.thav.thales (NPlex 6.5.026) id 49EBDED400025BAE for linuxppc-dev@ozlabs.org; Wed, 22 Apr 2009 11:10:50 +0200 Received: from vpspms02.val.fr.thav.thales (localhost.localdomain [127.0.0.1]) by localhost (Postfix) with SMTP id 30FA5807E for ; Wed, 22 Apr 2009 11:10:50 +0200 (CEST) Received: from xbdxuspmail.bdx.fr.thav.thales (xbdxuspmail.bdx.fr.thav.thales [128.1.62.154]) by vpspms02.val.fr.thav.thales (Postfix) with ESMTP id E3EBD8091 for ; Wed, 22 Apr 2009 11:10:49 +0200 (CEST) Message-ID: <49EEDF17.9010109@fr.thalesgroup.com> Date: Wed, 22 Apr 2009 11:10:47 +0200 From: Nicolas Lavocat MIME-Version: 1.0 To: Liu Dave-R63238 , linuxppc-dev Subject: Re: freeze when reading a PCI bridge register References: <49EECF8D.9000808@fr.thalesgroup.com> <49EED5EB.7050005@fr.thalesgroup.com> In-Reply-To: Content-Type: text/html; charset=ISO-8859-1 List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Hum... It is a proprietary bridge... I don't know how works the marvel, but it is not like tundra (TSI108)... But it seems that this bridge works like X86 bridges. I 'm goigng to read documentations about Marvel bridges!

Nicolas Lavocat

Liu Dave-R63238 a écrit :

So the host bridge is important, what is the bridge?

Marvell or Tundra chipset?

From: Nicolas Lavocat [mailto:nicolas.lavocat@fr.thalesgroup.com]
Sent: Wednesday, April 22, 2009 4:32 PM
To: Liu Dave-R63238
Cc: linuxppc-dev
Subject: Re: freeze when reading a PCI bridge register

a 7448

Liu Dave-R63238 a écrit :

I' am trying to configure a PCI bridge on a private board, with a 
powerpc . In a first time, I tried to get informations about PCI 
devices, in order to be sure  that  my read  and write methods work ( 
using 2 configuration registers, like on an x86 architecture.) . 2 
configuration registers  are used, for example we  write  an encoded 
address (it is a request to a PCI device) in the first and 
the answer of 
the PCI device can be read in the second register (it is a 
configuration 
cycle)
Firstly, I did it by JTAG: it works. Then, under uboot, it is ok.

For example, the code used under u-boot:

volatile u32* addr;
u32 vendor_device_ID;

puts("PCI1 reading PCI VENDOR and DEVICE ID\n");
addr=CFG_ADDR_PCI1;
*addr=0x80007800;

addr= CFG_DATA_PCI1;
vendor_device_ID= *addr;
printf("PCI1: PCI1_VENDOR_DEVICE_ID= %08x  \n" ,vendor_device_ID);


Therefore, when I do the same thing under Linux, the system 
crash when I 
try to read the second register...
Linux is frozen, and there is no error message.
Under Linux, I made an ioremap before use the registers and access to 
these registers thanks to  functions  "in_be32" and "out_be32".
I tried with different endianness to avoid an error of this type.

If I understand, the main difference between u-boot and Linux (about 
registers access) is the activation of the MMU.
So I thought that  problem could come from it. 
I think the problem could came from the configuration of DBAT 
and IBATS 
registers of the MMU, but I didn't found any information 
about the MMU 
configuration under Linux.
So after this novel, I have some questions:

-Is the MMU configuration generic under Linux?
-Does somebody think that the problem doesn't come from MMU?
-How does work ioremap? Is it a fully software function, or does it 
speaks to MMU to get the effective address from physical address?
-Does somebody have an idea, or a documentation about MMU 
configuration 
under linux?
-Do you think that my MMU is under the control of an evil spirit? ^^

What is the PowerPC you are using?