From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from ovro.ovro.caltech.edu (ovro.ovro.caltech.edu [192.100.16.2]) by ozlabs.org (Postfix) with ESMTP id 18E37DDE07 for ; Tue, 28 Apr 2009 06:00:13 +1000 (EST) Message-ID: <49F60EC9.2050501@ovro.caltech.edu> Date: Mon, 27 Apr 2009 13:00:09 -0700 From: David Hawkins MIME-Version: 1.0 To: Kumar Gala Subject: Re: [PATCH] fsldma: use PCI Read Multiple command References: <20090424183517.GB23140@ovro.caltech.edu> <49F608B7.9080409@ovro.caltech.edu> <49F60A3A.4060402@freescale.com> <49F60BF8.8040404@ovro.caltech.edu> <46B638E2-885C-4281-81EA-CB685264E143@kernel.crashing.org> In-Reply-To: <46B638E2-885C-4281-81EA-CB685264E143@kernel.crashing.org> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Cc: Ira Snyder , Liu Dave-R63238 , linux-kernel@vger.kernel.org, linuxppc-dev@ozlabs.org, Dan Williams , Timur Tabi List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , >> Can you give me an example of non-PCI memory that would be >> non-prefetchable that you'd like us to try? We can see if our >> host CPUs have an area like that ... we just need to know >> what device to look for first :) > > You can mark the pci inbound window on the 83xx as non-prefetchable > (assuming 83xx is host). On a x86 host I doubt there is any easy way to > get non-prefetchable memory. Yep, we were going to do that, but chose to use the 1MB region already setup for the IMMRs since its already marked as non-prefetchable. We were only doing reads, so it wasn't going to hurt anything. I doubt that marking one of the other BAR regions as non-prefetchable will give a different result. However, we're more than happy to double-check if you'd like. Cheers, Dave