From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from az33egw02.freescale.net (az33egw02.freescale.net [192.88.158.103]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "az33egw02.freescale.net", Issuer "Thawte Premium Server CA" (verified OK)) by ozlabs.org (Postfix) with ESMTPS id EDDA3DDE22 for ; Tue, 28 Apr 2009 06:04:56 +1000 (EST) Message-ID: <49F60FE1.90707@freescale.com> Date: Mon, 27 Apr 2009 15:04:49 -0500 From: Timur Tabi MIME-Version: 1.0 To: David Hawkins Subject: Re: [PATCH] fsldma: use PCI Read Multiple command References: <20090424183517.GB23140@ovro.caltech.edu> <49F608B7.9080409@ovro.caltech.edu> <49F60A3A.4060402@freescale.com> <49F60BF8.8040404@ovro.caltech.edu> In-Reply-To: <49F60BF8.8040404@ovro.caltech.edu> Content-Type: text/plain; charset=ISO-8859-1 Cc: linuxppc-dev@ozlabs.org, Dan Williams , Liu Dave-R63238 , linux-kernel@vger.kernel.org, Ira Snyder List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , David Hawkins wrote: > Can you give me an example of non-PCI memory that would be > non-prefetchable that you'd like us to try? We can see if our > host CPUs have an area like that ... we just need to know > what device to look for first :) Hmmmm.... I was going to say any SOC device in the IMMR, but I don't see anything there that would constitute a memory buffer. I test this change on an 8610 and DMA to a register I/O, where this bit isn't even defined, and it made no difference. So I guess this change is okay. Acked-by: Timur Tabi -- Timur Tabi Linux kernel developer at Freescale