From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3yjsVd1r94zDrKl for ; Fri, 24 Nov 2017 21:14:16 +1100 (AEDT) Received: from pps.filterd (m0098409.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id vAOADTW6101914 for ; Fri, 24 Nov 2017 05:14:14 -0500 Received: from e06smtp10.uk.ibm.com (e06smtp10.uk.ibm.com [195.75.94.106]) by mx0a-001b2d01.pphosted.com with ESMTP id 2eegfcau8k-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Fri, 24 Nov 2017 05:14:14 -0500 Received: from localhost by e06smtp10.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Fri, 24 Nov 2017 10:14:12 -0000 Subject: Re: [PATCH] cxl: Add support for ASB_Notify on POWER9 To: benh@au1.ibm.com, linuxppc-dev@lists.ozlabs.org, fbarrat@linux.vnet.ibm.com, vaibhav@linux.vnet.ibm.com, andrew.donnellan@au1.ibm.com References: <1511435132-24020-1-git-send-email-clombard@linux.vnet.ibm.com> <1511469668.2466.48.camel@au1.ibm.com> From: christophe lombard Date: Fri, 24 Nov 2017 11:14:08 +0100 MIME-Version: 1.0 In-Reply-To: <1511469668.2466.48.camel@au1.ibm.com> Content-Type: text/plain; charset=utf-8; format=flowed Message-Id: <49cd46e7-c13e-c82c-404c-2c9e989b9774@linux.vnet.ibm.com> List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Le 23/11/2017 à 21:41, Benjamin Herrenschmidt a écrit : > On Thu, 2017-11-23 at 12:05 +0100, Christophe Lombard wrote: >> The POWER9 core supports a new feature: ASB_Notify which requires the >> support of the Special Purpose Register: TIDR. >> >> The ASB_Notify command, generated by the AFU, will attempt to >> wake-up the host thread identified by the particular LPID:PID:TID. >> >> This patch assign a unique TIDR (thread id) for the current thread which >> will be used in the process element entry. > > Is that keyd off some device-tree property or similar ? There is no > guarantee that the TIDR and ASB_Notify still exist on future chips... > > Ben. > To my knowledge, there is no property (or similar), somewhere, that indicating that the TIDR is supported or not. For the time being, if I am not wrong, the only check we have, is this condition in the function set_thread_tidr(struct task_struct *t): if (!cpu_has_feature(CPU_FTR_ARCH_300)) return -EINVAL; Christophe