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Date: Tue, 10 Nov 2009 10:55:28 -0600
From: Scott Wood <scottwood@freescale.com>
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To: Joakim Tjernlund <joakim.tjernlund@transmode.se>
Subject: Re: [PATCH 0/8] 8xx: Misc fixes for buggy insn
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Cc: "linuxppc-dev@ozlabs.org" <linuxppc-dev@ozlabs.org>,
	Rex Feany <RFeany@mrv.com>
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Scott Wood wrote:
> Joakim Tjernlund wrote:
>> Why does not pinning interact well with CPU15? If pinned, you never get
>> a TLB miss for kernel text so that should mitigate the CPU15 problem.
> 
> The nature of the workaround for CPU15 is that we can't keep it pinned 
> -- we have to take an ITLB miss on every page boundary crossing.  If you 
> try to pin, it'll just be invalidated by the workaround.

Except that the invalidation only happens when you take an ITLB miss on 
an adjacent page, which means we'd likely never get CPU15 protection for 
kernel code if pinning is enabled. :-(

-Scott