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Date: Tue, 10 Nov 2009 17:21:18 -0600
From: Scott Wood <scottwood@freescale.com>
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To: Joakim Tjernlund <joakim.tjernlund@transmode.se>
Subject: Re: [PATCH 0/8] 8xx: Misc fixes for buggy insn
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Cc: "linuxppc-dev@ozlabs.org" <linuxppc-dev@ozlabs.org>,
	Rex Feany <RFeany@mrv.com>
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Joakim Tjernlund wrote:
> Scott Wood <scottwood@freescale.com> wrote on 10/11/2009 23:02:10:
>> Joakim Tjernlund wrote:
>> It wasn't the CPU15 workaround that I was worried about taking down the
>> pinning -- but rather the CPU15 bug itself causing bad code to be
>> executed inside the pinned kernel mapping.
> 
> Oh, but then one is screwed anyway.

Not if there's a workaround...

>> However, the erratum says "MMU page", not "4K region", so I suppose if
>> we have a pinned 8M page the problem could only occur at the end of the
>> 8M (by which point the text segment should have ended).
> 
> The wording makes me wonder why not a dcbi would fix the problem too.
> Invalidate the problem cache lines and let the branch resolve.

Where would you put the dcbi?  How do you regain control after that 
cache line has been refilled, but before code flows back to the bad branch?

-Scott