From: Scott Wood <scottwood@freescale.com>
To: Joakim Tjernlund <joakim.tjernlund@transmode.com>
Cc: "linuxppc-dev@ozlabs.org" <linuxppc-dev@ozlabs.org>,
Rex Feany <RFeany@mrv.com>
Subject: Re: [PATCH 0/8] 8xx: Misc fixes for buggy insn
Date: Thu, 12 Nov 2009 13:45:59 -0600 [thread overview]
Message-ID: <4AFC65F7.4050600@freescale.com> (raw)
In-Reply-To: <OFE47A9BB7.59140781-ONC125766C.00322B87-C125766C.003266AD@transmode.se>
Joakim Tjernlund wrote:
> Scott Wood <scottwood@freescale.com> wrote on 11/11/2009 16:26:53:
>> On Wed, Nov 11, 2009 at 01:06:10AM +0100, Joakim Tjernlund wrote:
>>> Scott Wood <scottwood@freescale.com> wrote on 11/11/2009 00:21:18:
>>>> Where would you put the dcbi? How do you regain control after that
>>>> cache line has been refilled, but before code flows back to the bad branch?
>>> The dcbi would replace the current CPU15 tlbie.
>> But that only works if you take an ITLB miss at the right time.
>
> Yeah, I misread the CPU15 errata so my ideas will not work.
>
> Anyhow, will you send a patch that make TLB pinning mandatory?
> After that my series can go in.
One other concern with pinning on 8xx -- could it cause problems with
uncached DMA mappings? What happens if a speculative load pulls in a
cache line in an area that's supposed to be uncached?
-Scott
next prev parent reply other threads:[~2009-11-12 19:45 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-11-04 13:38 [PATCH 0/8] 8xx: Misc fixes for buggy insn Joakim Tjernlund
2009-11-04 13:38 ` [PATCH 1/8] 8xx: invalidate non present TLBs Joakim Tjernlund
2009-11-04 13:38 ` [PATCH 2/8] 8xx: Update TLB asm so it behaves as linux mm expects Joakim Tjernlund
2009-11-04 13:38 ` [PATCH 3/8] 8xx: Tag DAR with 0x00f0 to catch buggy instructions Joakim Tjernlund
2009-11-04 13:38 ` [PATCH 4/8] 8xx: Fixup DAR from buggy dcbX instructions Joakim Tjernlund
2009-11-04 13:38 ` [PATCH 5/8] 8xx: Add missing Guarded setting in DTLB Error Joakim Tjernlund
2009-11-04 13:38 ` [PATCH 6/8] 8xx: Restore _PAGE_WRITETHRU Joakim Tjernlund
2009-11-04 13:38 ` [PATCH 7/8] 8xx: start using dcbX instructions in various copy routines Joakim Tjernlund
2009-11-04 13:38 ` [PATCH 8/8] 8xx: Remove DIRTY pte handling in DTLB Error Joakim Tjernlund
2009-11-06 0:33 ` [PATCH 0/8] 8xx: Misc fixes for buggy insn Scott Wood
2009-11-06 8:01 ` Joakim Tjernlund
2009-11-06 9:29 ` Joakim Tjernlund
[not found] ` <20091109215321.GA4351@loki.buserror.net>
2009-11-09 23:00 ` Scott Wood
2009-11-10 8:27 ` Joakim Tjernlund
2009-11-10 16:36 ` Scott Wood
2009-11-10 16:55 ` Scott Wood
2009-11-10 19:08 ` Joakim Tjernlund
[not found] ` <4AF9CC99.1030500@freescale.com>
2009-11-10 21:25 ` Joakim Tjernlund
[not found] ` <4AF9DCE0.4030805@freescale.com>
2009-11-10 21:47 ` Joakim Tjernlund
2009-11-10 22:02 ` Scott Wood
2009-11-10 23:15 ` Joakim Tjernlund
2009-11-10 23:21 ` Scott Wood
2009-11-11 0:06 ` Joakim Tjernlund
2009-11-11 15:26 ` Scott Wood
2009-11-12 9:10 ` Joakim Tjernlund
2009-11-12 19:45 ` Scott Wood [this message]
2009-11-12 21:14 ` Joakim Tjernlund
2009-11-12 21:57 ` Scott Wood
2009-11-12 23:29 ` Joakim Tjernlund
2009-11-13 19:25 ` Scott Wood
2009-11-14 14:11 ` Joakim Tjernlund
2009-11-10 19:54 ` Joakim Tjernlund
[not found] ` <4AF9C647.50600@freescale.com>
2009-11-10 21:05 ` Joakim Tjernlund
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