* [RFC][PATCH 1/2] powerpc/85xx: create dts components to build up an SoC @ 2011-10-20 7:24 Kumar Gala 2011-10-20 7:24 ` [RFC][PATCH 2/2] powerpc/85xx: Introduce a P1020 SoC device tree Kumar Gala 2011-10-20 16:42 ` [RFC][PATCH 1/2] powerpc/85xx: create dts components to build up an SoC Tabi Timur-B04825 0 siblings, 2 replies; 8+ messages in thread From: Kumar Gala @ 2011-10-20 7:24 UTC (permalink / raw) To: linuxppc-dev; +Cc: devicetree-discuss Introduce some common components that we can utilize to build up the various PQ3/85xx device trees. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> --- arch/powerpc/boot/dts/fsl/pq3-dma-0.dtsi | 32 +++++++++++++++++++++++++++ arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi | 8 ++++++ arch/powerpc/boot/dts/fsl/pq3-duart-1.dtsi | 8 ++++++ arch/powerpc/boot/dts/fsl/pq3-etsec2-0.dtsi | 32 +++++++++++++++++++++++++++ arch/powerpc/boot/dts/fsl/pq3-etsec2-1.dtsi | 32 +++++++++++++++++++++++++++ arch/powerpc/boot/dts/fsl/pq3-etsec2-2.dtsi | 32 +++++++++++++++++++++++++++ arch/powerpc/boot/dts/fsl/pq3-i2c-0.dtsi | 9 +++++++ arch/powerpc/boot/dts/fsl/pq3-i2c-1.dtsi | 9 +++++++ 8 files changed, 162 insertions(+), 0 deletions(-) create mode 100644 arch/powerpc/boot/dts/fsl/pq3-dma-0.dtsi create mode 100644 arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi create mode 100644 arch/powerpc/boot/dts/fsl/pq3-duart-1.dtsi create mode 100644 arch/powerpc/boot/dts/fsl/pq3-etsec2-0.dtsi create mode 100644 arch/powerpc/boot/dts/fsl/pq3-etsec2-1.dtsi create mode 100644 arch/powerpc/boot/dts/fsl/pq3-etsec2-2.dtsi create mode 100644 arch/powerpc/boot/dts/fsl/pq3-i2c-0.dtsi create mode 100644 arch/powerpc/boot/dts/fsl/pq3-i2c-1.dtsi diff --git a/arch/powerpc/boot/dts/fsl/pq3-dma-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-dma-0.dtsi new file mode 100644 index 0000000..60aa877 --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/pq3-dma-0.dtsi @@ -0,0 +1,32 @@ +&dma0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,eloplus-dma"; + reg = <0x21300 0x4>; + ranges = <0x0 0x21100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupts = <20 2 0 0>; + }; + dma-channel@80 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupts = <21 2 0 0>; + }; + dma-channel@100 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupts = <22 2 0 0>; + }; + dma-channel@180 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupts = <23 2 0 0>; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi new file mode 100644 index 0000000..bac1f0d --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi @@ -0,0 +1,8 @@ +&serial0 { + cell-index = <0>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4500 0x100>; + clock-frequency = <0>; + interrupts = <42 2 0 0>; +}; diff --git a/arch/powerpc/boot/dts/fsl/pq3-duart-1.dtsi b/arch/powerpc/boot/dts/fsl/pq3-duart-1.dtsi new file mode 100644 index 0000000..97bbacb --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/pq3-duart-1.dtsi @@ -0,0 +1,8 @@ +&serial1 { + cell-index = <1>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4600 0x100>; + clock-frequency = <0>; + interrupts = <42 2 0 0>; +}; diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec2-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec2-0.dtsi new file mode 100644 index 0000000..73fff36 --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/pq3-etsec2-0.dtsi @@ -0,0 +1,32 @@ +&mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,etsec2-mdio"; + reg = <0x24000 0x1000 0xb0030 0x4>; +}; + +&enet0 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "network"; + model = "eTSEC"; + compatible = "fsl,etsec2"; + fsl,num_rx_queues = <0x8>; + fsl,num_tx_queues = <0x8>; + fsl,magic-packet; + local-mac-address = [ 00 00 00 00 00 00 ]; + + queue-group@0 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0xb0000 0x1000>; + interrupts = <29 2 0 0 30 2 0 0 34 2 0 0>; + }; + + queue-group@1 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0xb4000 0x1000>; + interrupts = <17 2 0 0 18 2 0 0 24 2 0 0>; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec2-1.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec2-1.dtsi new file mode 100644 index 0000000..7ec73c4 --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/pq3-etsec2-1.dtsi @@ -0,0 +1,32 @@ +&mdio1 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,etsec2-tbi"; + reg = <0x25000 0x1000 0xb1030 0x4>; +}; + +&enet1 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "network"; + model = "eTSEC"; + compatible = "fsl,etsec2"; + fsl,num_rx_queues = <0x8>; + fsl,num_tx_queues = <0x8>; + fsl,magic-packet; + local-mac-address = [ 00 00 00 00 00 00 ]; + + queue-group@0 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0xb1000 0x1000>; + interrupts = <35 2 0 0 36 2 0 0 40 2 0 0>; + }; + + queue-group@1 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0xb5000 0x1000>; + interrupts = <51 2 0 0 52 2 0 0 67 2 0 0>; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec2-2.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec2-2.dtsi new file mode 100644 index 0000000..50a078a --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/pq3-etsec2-2.dtsi @@ -0,0 +1,32 @@ +&mdio2 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,etsec2-tbi"; + reg = <0x26000 0x1000 0xb1030 0x4>; +}; + +&enet2 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "network"; + model = "eTSEC"; + compatible = "fsl,etsec2"; + fsl,num_rx_queues = <0x8>; + fsl,num_tx_queues = <0x8>; + fsl,magic-packet; + local-mac-address = [ 00 00 00 00 00 00 ]; + + queue-group@0 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0xb2000 0x1000>; + interrupts = <31 2 0 0 32 2 0 0 33 2 0 0>; + }; + + queue-group@1 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0xb6000 0x1000>; + interrupts = <25 2 0 0 26 2 0 0 27 2 0 0>; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/pq3-i2c-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-i2c-0.dtsi new file mode 100644 index 0000000..ef75cca --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/pq3-i2c-0.dtsi @@ -0,0 +1,9 @@ +&i2c0 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + compatible = "fsl-i2c"; + reg = <0x3000 0x100>; + interrupts = <43 2 0 0>; + dfsrr; +}; diff --git a/arch/powerpc/boot/dts/fsl/pq3-i2c-1.dtsi b/arch/powerpc/boot/dts/fsl/pq3-i2c-1.dtsi new file mode 100644 index 0000000..e24043a --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/pq3-i2c-1.dtsi @@ -0,0 +1,9 @@ +&i2c1 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <1>; + compatible = "fsl-i2c"; + reg = <0x3100 0x100>; + interrupts = <43 2 0 0>; + dfsrr; +}; -- 1.7.3.4 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [RFC][PATCH 2/2] powerpc/85xx: Introduce a P1020 SoC device tree 2011-10-20 7:24 [RFC][PATCH 1/2] powerpc/85xx: create dts components to build up an SoC Kumar Gala @ 2011-10-20 7:24 ` Kumar Gala 2011-10-20 16:28 ` Tabi Timur-B04825 2011-10-20 16:42 ` [RFC][PATCH 1/2] powerpc/85xx: create dts components to build up an SoC Tabi Timur-B04825 1 sibling, 1 reply; 8+ messages in thread From: Kumar Gala @ 2011-10-20 7:24 UTC (permalink / raw) To: linuxppc-dev; +Cc: devicetree-discuss Create a P1020 SoC dts stub that can be included by a board that utilizes the P1020 SoC. The board can amend any board specific configuration or paramaters (like locaation of CCSRBAR, PCIe controllers, I2C components, ethernet PHY information, etc.) Signed-off-by: Kumar Gala <galak@kernel.crashing.org> --- arch/powerpc/boot/dts/p1020soc.dtsi | 262 +++++++++++++++++++++++++++++++++++ 1 files changed, 262 insertions(+), 0 deletions(-) create mode 100644 arch/powerpc/boot/dts/p1020soc.dtsi diff --git a/arch/powerpc/boot/dts/p1020soc.dtsi b/arch/powerpc/boot/dts/p1020soc.dtsi new file mode 100644 index 0000000..0abc015 --- /dev/null +++ b/arch/powerpc/boot/dts/p1020soc.dtsi @@ -0,0 +1,262 @@ +&lbc { + #address-cells = <2>; + #size-cells = <1>; + compatible = "fsl,p1020-elbc", "fsl,elbc", "simple-bus"; + interrupts = <19 2 0 0>; +}; + +&pci0 { + compatible = "fsl,mpc8548-pcie"; + device_type = "pci"; + #size-cells = <2>; + #address-cells = <3>; + bus-range = <0 255>; + clock-frequency = <33333333>; + interrupts = <16 2 0 0>; + + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupts = <16 2 0 0>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0x0 0x0 0x1 &mpic 0x4 0x1 + 0000 0x0 0x0 0x2 &mpic 0x5 0x1 + 0000 0x0 0x0 0x3 &mpic 0x6 0x1 + 0000 0x0 0x0 0x4 &mpic 0x7 0x1 + >; + }; + +}; + +&pci1 { + compatible = "fsl,mpc8548-pcie"; + device_type = "pci"; + #size-cells = <2>; + #address-cells = <3>; + bus-range = <0 255>; + clock-frequency = <33333333>; + interrupts = <16 2 0 0>; + + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupts = <16 2 0 0>; + interrupt-map-mask = <0xf800 0 0 7>; + + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0x0 0x0 0x1 &mpic 0x0 0x1 + 0000 0x0 0x0 0x2 &mpic 0x1 0x1 + 0000 0x0 0x0 0x3 &mpic 0x2 0x1 + 0000 0x0 0x0 0x4 &mpic 0x3 0x1 + >; + }; +}; + + + +&soc { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + compatible = "fsl,p1020-immr", "simple-bus"; + bus-frequency = <0>; // Filled out by uboot. + + ecm-law@0 { + compatible = "fsl,ecm-law"; + reg = <0x0 0x1000>; + fsl,num-laws = <12>; + }; + + ecm@1000 { + compatible = "fsl,p1020-ecm", "fsl,ecm"; + reg = <0x1000 0x1000>; + interrupts = <16 2 0 0>; + }; + + memory-controller@2000 { + compatible = "fsl,p1020-memory-controller"; + reg = <0x2000 0x1000>; + interrupts = <16 2 0 0>; + }; + + i2c0: i2c@3000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + compatible = "fsl-i2c"; + reg = <0x3000 0x100>; + interrupts = <43 2 0 0>; + dfsrr; + }; + + i2c1: i2c@3100 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <1>; + compatible = "fsl-i2c"; + reg = <0x3100 0x100>; + interrupts = <43 2 0 0>; + dfsrr; + }; + + serial0: serial@4500 { + }; + + serial1: serial@4600 { + }; + + spi@7000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,p1020-espi", "fsl,mpc8536-espi"; + reg = <0x7000 0x1000>; + interrupts = <59 0x2 0 0>; + fsl,espi-num-chipselects = <4>; + }; + + gpio: gpio-controller@f000 { + #gpio-cells = <2>; + compatible = "fsl,mpc8572-gpio"; + reg = <0xf000 0x100>; + interrupts = <47 0x2 0 0>; + gpio-controller; + }; + + L2: l2-cache-controller@20000 { + compatible = "fsl,p1020-l2-cache-controller"; + reg = <0x20000 0x1000>; + cache-line-size = <32>; // 32 bytes + cache-size = <0x40000>; // L2,256K + interrupts = <16 2 0 0>; + }; + + dma0: dma@21300 { + }; + + mdio0: mdio@24000 { + }; + + mdio1: mdio@25000 { + }; + + mdio2: mdio@26000 { + }; + + enet0: ethernet@b0000 { + }; + + enet1: ethernet@b1000 { + }; + + enet2: ethernet@b2000 { + }; + + usb@22000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl-usb2-dr"; + reg = <0x22000 0x1000>; + interrupts = <28 0x2 0 0>; + }; + + /* USB2 is shared with localbus, so it must be disabled + by default. We can't put 'status = "disabled";' here + since U-Boot doesn't clear the status property when + it enables USB2. OTOH, U-Boot does create a new node + when there isn't any. So, just comment it out. + usb@23000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl-usb2-dr"; + reg = <0x23000 0x1000>; + interrupts = <46 0x2 0 0>; + phy_type = "ulpi"; + }; + */ + + sdhci@2e000 { + compatible = "fsl,p1020-esdhc", "fsl,esdhc"; + reg = <0x2e000 0x1000>; + interrupts = <72 0x2 0 0>; + /* Filled in by U-Boot */ + clock-frequency = <0>; + }; + + crypto@30000 { + compatible = "fsl,sec3.3", "fsl,sec3.1", "fsl,sec3.0", + "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1", + "fsl,sec2.0"; + reg = <0x30000 0x10000>; + interrupts = <45 2 0 0 58 2 0 0>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0x97c>; + fsl,descriptor-types-mask = <0x3a30abf>; + }; + + mpic: pic@40000 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <4>; + reg = <0x40000 0x40000>; + compatible = "chrp,open-pic"; + device_type = "open-pic"; + }; + + timer@41100 { + compatible = "fsl,mpic-global-timer"; + reg = <0x41100 0x100 0x41300 4>; + interrupts = <0 0 3 0 + 1 0 3 0 + 2 0 3 0 + 3 0 3 0>; + }; + + timer@42100 { + compatible = "fsl,mpic-global-timer"; + reg = <0x42100 0x100 0x42300 4>; + interrupts = <4 0 3 0 + 5 0 3 0 + 6 0 3 0 + 7 0 3 0>; + }; + + msi@41600 { + compatible = "fsl,p1020-msi", "fsl,mpic-msi"; + reg = <0x41600 0x80>; + msi-available-ranges = <0 0x100>; + interrupts = < + 0xe0 0 0 0 + 0xe1 0 0 0 + 0xe2 0 0 0 + 0xe3 0 0 0 + 0xe4 0 0 0 + 0xe5 0 0 0 + 0xe6 0 0 0 + 0xe7 0 0 0>; + }; + + global-utilities@e0000 { //global utilities block + compatible = "fsl,p1020-guts","fsl,p2020-guts"; + reg = <0xe0000 0x1000>; + fsl,has-rstcr; + }; +}; + +/include/ "fsl/pq3-dma-0.dtsi" +/include/ "fsl/pq3-duart-0.dtsi" +/include/ "fsl/pq3-duart-1.dtsi" +/include/ "fsl/pq3-etsec2-0.dtsi" +/include/ "fsl/pq3-etsec2-1.dtsi" +/include/ "fsl/pq3-etsec2-2.dtsi" +/include/ "fsl/pq3-i2c-0.dtsi" +/include/ "fsl/pq3-i2c-1.dtsi" -- 1.7.3.4 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [RFC][PATCH 2/2] powerpc/85xx: Introduce a P1020 SoC device tree 2011-10-20 7:24 ` [RFC][PATCH 2/2] powerpc/85xx: Introduce a P1020 SoC device tree Kumar Gala @ 2011-10-20 16:28 ` Tabi Timur-B04825 2011-10-20 20:56 ` Kumar Gala 0 siblings, 1 reply; 8+ messages in thread From: Tabi Timur-B04825 @ 2011-10-20 16:28 UTC (permalink / raw) To: Kumar Gala; +Cc: linuxppc-dev@ozlabs.org, devicetree-discuss@lists.ozlabs.org On Thu, Oct 20, 2011 at 2:24 AM, Kumar Gala <galak@kernel.crashing.org> wro= te: > > =A0arch/powerpc/boot/dts/p1020soc.dtsi | =A0262 +++++++++++++++++++++++++= ++++++++++ All of the other dtsi files are of the format "___si.dtsi". Why does this one use "___soc.dtsi"? --=20 Timur Tabi Linux kernel developer at Freescale= ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [RFC][PATCH 2/2] powerpc/85xx: Introduce a P1020 SoC device tree 2011-10-20 16:28 ` Tabi Timur-B04825 @ 2011-10-20 20:56 ` Kumar Gala 0 siblings, 0 replies; 8+ messages in thread From: Kumar Gala @ 2011-10-20 20:56 UTC (permalink / raw) To: Tabi Timur-B04825 Cc: linuxppc-dev@ozlabs.org, devicetree-discuss@lists.ozlabs.org On Oct 20, 2011, at 11:28 AM, Tabi Timur-B04825 wrote: > On Thu, Oct 20, 2011 at 2:24 AM, Kumar Gala = <galak@kernel.crashing.org> wrote: >>=20 >> arch/powerpc/boot/dts/p1020soc.dtsi | 262 = +++++++++++++++++++++++++++++++++++ >=20 > All of the other dtsi files are of the format "___si.dtsi". Why does > this one use "___soc.dtsi"? I intend to also have a ___si.dtsi, still playing around with this so we = have less overall duplication to support both 32 & 36-bit address maps = as an example. - k= ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [RFC][PATCH 1/2] powerpc/85xx: create dts components to build up an SoC 2011-10-20 7:24 [RFC][PATCH 1/2] powerpc/85xx: create dts components to build up an SoC Kumar Gala 2011-10-20 7:24 ` [RFC][PATCH 2/2] powerpc/85xx: Introduce a P1020 SoC device tree Kumar Gala @ 2011-10-20 16:42 ` Tabi Timur-B04825 2011-10-20 20:44 ` Kumar Gala 1 sibling, 1 reply; 8+ messages in thread From: Tabi Timur-B04825 @ 2011-10-20 16:42 UTC (permalink / raw) To: Kumar Gala; +Cc: linuxppc-dev@ozlabs.org, devicetree-discuss@lists.ozlabs.org Ok, your other patch makes more sense now. On Thu, Oct 20, 2011 at 2:24 AM, Kumar Gala <galak@kernel.crashing.org> wro= te: > +++ b/arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi > @@ -0,0 +1,8 @@ > +&serial0 { > + =A0 =A0 =A0 cell-index =3D <0>; > + =A0 =A0 =A0 device_type =3D "serial"; > + =A0 =A0 =A0 compatible =3D "ns16550"; > + =A0 =A0 =A0 reg =3D <0x4500 0x100>; > + =A0 =A0 =A0 clock-frequency =3D <0>; > + =A0 =A0 =A0 interrupts =3D <42 2 0 0>; > +}; How about we put all serial devices into one pq3-duart.dtsi file, and let the parent dtsi file reference just the ones that it needs? --=20 Timur Tabi Linux kernel developer at Freescale= ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [RFC][PATCH 1/2] powerpc/85xx: create dts components to build up an SoC 2011-10-20 16:42 ` [RFC][PATCH 1/2] powerpc/85xx: create dts components to build up an SoC Tabi Timur-B04825 @ 2011-10-20 20:44 ` Kumar Gala 2011-10-20 21:05 ` Timur Tabi 0 siblings, 1 reply; 8+ messages in thread From: Kumar Gala @ 2011-10-20 20:44 UTC (permalink / raw) To: Tabi Timur-B04825 Cc: linuxppc-dev@ozlabs.org, devicetree-discuss@lists.ozlabs.org On Oct 20, 2011, at 11:42 AM, Tabi Timur-B04825 wrote: > Ok, your other patch makes more sense now. >=20 > On Thu, Oct 20, 2011 at 2:24 AM, Kumar Gala = <galak@kernel.crashing.org> wrote: >=20 >> +++ b/arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi >> @@ -0,0 +1,8 @@ >> +&serial0 { >> + cell-index =3D <0>; >> + device_type =3D "serial"; >> + compatible =3D "ns16550"; >> + reg =3D <0x4500 0x100>; >> + clock-frequency =3D <0>; >> + interrupts =3D <42 2 0 0>; >> +}; >=20 > How about we put all serial devices into one pq3-duart.dtsi file, and > let the parent dtsi file reference just the ones that it needs? there isn't an option to do that w/dtc - k= ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [RFC][PATCH 1/2] powerpc/85xx: create dts components to build up an SoC 2011-10-20 20:44 ` Kumar Gala @ 2011-10-20 21:05 ` Timur Tabi 2011-10-21 3:03 ` Kumar Gala 0 siblings, 1 reply; 8+ messages in thread From: Timur Tabi @ 2011-10-20 21:05 UTC (permalink / raw) To: Kumar Gala; +Cc: linuxppc-dev@ozlabs.org, devicetree-discuss@lists.ozlabs.org Kumar Gala wrote: >> > How about we put all serial devices into one pq3-duart.dtsi file, and >> > let the parent dtsi file reference just the ones that it needs? > there isn't an option to do that w/dtc What about making all the nodes disabled by default, and then the soc.dtsi or si.dtsi file can re-enable them? -- Timur Tabi Linux kernel developer at Freescale ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [RFC][PATCH 1/2] powerpc/85xx: create dts components to build up an SoC 2011-10-20 21:05 ` Timur Tabi @ 2011-10-21 3:03 ` Kumar Gala 0 siblings, 0 replies; 8+ messages in thread From: Kumar Gala @ 2011-10-21 3:03 UTC (permalink / raw) To: Timur Tabi; +Cc: linuxppc-dev@ozlabs.org, devicetree-discuss@lists.ozlabs.org On Oct 20, 2011, at 4:05 PM, Timur Tabi wrote: > Kumar Gala wrote: >>>> How about we put all serial devices into one pq3-duart.dtsi file, = and >>>> let the parent dtsi file reference just the ones that it needs? >> there isn't an option to do that w/dtc >=20 > What about making all the nodes disabled by default, and then the = soc.dtsi > or si.dtsi file can re-enable them? Its still a bit problematic in that I don't want nodes to exist that = aren't in the SoC. - k= ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2011-10-21 3:03 UTC | newest] Thread overview: 8+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2011-10-20 7:24 [RFC][PATCH 1/2] powerpc/85xx: create dts components to build up an SoC Kumar Gala 2011-10-20 7:24 ` [RFC][PATCH 2/2] powerpc/85xx: Introduce a P1020 SoC device tree Kumar Gala 2011-10-20 16:28 ` Tabi Timur-B04825 2011-10-20 20:56 ` Kumar Gala 2011-10-20 16:42 ` [RFC][PATCH 1/2] powerpc/85xx: create dts components to build up an SoC Tabi Timur-B04825 2011-10-20 20:44 ` Kumar Gala 2011-10-20 21:05 ` Timur Tabi 2011-10-21 3:03 ` Kumar Gala
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for NNTP newsgroup(s).