From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from ch1outboundpool.messaging.microsoft.com (ch1ehsobe002.messaging.microsoft.com [216.32.181.182]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (Client CN "mail.global.frontbridge.com", Issuer "Microsoft Secure Server Authority" (verified OK)) by ozlabs.org (Postfix) with ESMTPS id 372B5B6F87 for ; Tue, 25 Oct 2011 01:09:06 +1100 (EST) Message-ID: <4EA570AB.7040704@freescale.com> Date: Mon, 24 Oct 2011 09:05:31 -0500 From: Timur Tabi MIME-Version: 1.0 To: Kumar Gala Subject: Re: [PATCH 03/11] powerpc/85xx: Rework PCI nodes on P1020RDB References: <1319318452-27036-1-git-send-email-galak@kernel.crashing.org> <1319318452-27036-2-git-send-email-galak@kernel.crashing.org> <1319318452-27036-3-git-send-email-galak@kernel.crashing.org> In-Reply-To: <49F9A823-B7C3-4D53-A061-8AC1C8D22554@kernel.crashing.org> Content-Type: text/plain; charset="ISO-8859-1" Cc: "linuxppc-dev@ozlabs.org" List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Kumar Gala wrote: > I would have hoped the bindings had made it clear already what was board info vs what was SoC. When it comes to device trees, I never assume anything is "clear". > If not, they should be clarify that in the binding specs. I'm okay with that. -- Timur Tabi Linux kernel developer at Freescale