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From: Kumar Gala <galak@kernel.crashing.org>
Subject: Re: [PATCH] Fix the UCC rx tx clock of QE
Date: Wed, 18 Oct 2006 08:32:06 -0500
To: Liu Dave-r63238 <DaveLiu@freescale.com>
Cc: linuxppc-dev@ozlabs.org, Paul Mackerras <paulus@samba.org>
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Acked-by: Kumar Gala <galak@kernel.crashing.org>

- k

On Oct 18, 2006, at 3:36 AM, Liu Dave-r63238 wrote:

> CLK16 of CMXUCR3 and CMXUCR4 registers are missed in
> ucc_set_qe_mux_rxtx().
> This patch adds the CLK16 to the function. MPC8323EMDS board ethernet
> interface
> with RMII is use the CLK16 as the rx and tx clock.
>
> Signed-off-by: Dave Liu <daveliu@freescale.com>
>
> ---
> diff --git a/arch/powerpc/sysdev/qe_lib/ucc.c
> b/arch/powerpc/sysdev/qe_lib/ucc.c
> index 916c9e5..ac12a44 100644
> --- a/arch/powerpc/sysdev/qe_lib/ucc.c
> +++ b/arch/powerpc/sysdev/qe_lib/ucc.c
> @@ -207,6 +207,7 @@ int ucc_set_qe_mux_rxtx(int ucc_num, enu
>                 case QE_CLK18:  source = 8; break;
>                 case QE_CLK7:   source = 9; break;
>                 case QE_CLK8:   source = 10; break;
> +               case QE_CLK16:  source = 11; break;
>                 default:        source = -1; break;
>                 }
>                 break;
> @@ -222,6 +223,7 @@ int ucc_set_qe_mux_rxtx(int ucc_num, enu
>                 case QE_CLK22:  source = 8; break;
>                 case QE_CLK7:   source = 9; break;
>                 case QE_CLK8:   source = 10; break;
> +               case QE_CLK16:  source = 11; break;
>                 default:        source = -1; break;
>                 }
>                 break;
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