[PATCH 1/2] powerpc/85xx: fix localbus and PCI addresses in the P1022DS 36-bit device tree

[PATCH 1/2] powerpc/85xx: fix localbus and PCI addresses in the P1022DS 36-bit device tree

[Timur Tabi]

Fix the PCI buses in the 36-bit device tree for the P1022DS.  It was using
values copy-pasted from another device tree.

Also fix the NAND localbus bus address from ffa00000 to ff800000, which is
what U-boot sets it to.

Signed-off-by: Timur Tabi <timur@freescale.com>
---
 arch/powerpc/boot/dts/p1022ds.dts |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/boot/dts/p1022ds.dts b/arch/powerpc/boot/dts/p1022ds.dts
index 3e85d8c..a54dd13 100644
--- a/arch/powerpc/boot/dts/p1022ds.dts
+++ b/arch/powerpc/boot/dts/p1022ds.dts
@@ -21,7 +21,7 @@
 		reg = <0xf 0xffe05000 0 0x1000>;
 		ranges = <0x0 0x0 0xf 0xe8000000 0x08000000
 			  0x1 0x0 0xf 0xe0000000 0x08000000
-			  0x2 0x0 0xf 0xffa00000 0x00040000
+			  0x2 0x0 0xf 0xff800000 0x00040000
 			  0x3 0x0 0xf 0xffdf0000 0x00008000>;
 
 		/*
@@ -222,7 +222,7 @@
 
 	pci0: pcie@fffe09000 {
 		reg = <0xf 0xffe09000 0 0x1000>;
-		ranges = <0x2000000 0x0 0xa0000000 0xc 0x20000000 0x0 0x20000000
+		ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
 			  0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
 		pcie@0 {
 			ranges = <0x2000000 0x0 0xe0000000
@@ -237,7 +237,7 @@
 
 	pci1: pcie@fffe0a000 {
 		reg = <0xf 0xffe0a000 0 0x1000>;
-		ranges = <0x2000000 0x0 0xc0000000 0xc 0x40000000 0x0 0x20000000
+		ranges = <0x2000000 0x0 0xe0000000 0xc 0x40000000 0x0 0x20000000
 			  0x1000000 0x0 0x00000000 0xf 0xffc20000 0x0 0x10000>;
 		pcie@0 {
 			reg = <0x0 0x0 0x0 0x0 0x0>;
@@ -253,7 +253,7 @@
 
 	pci2: pcie@fffe0b000 {
 		reg = <0xf 0xffe0b000 0 0x1000>;
-		ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
+		ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
 			  0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
 		pcie@0 {
 			ranges = <0x2000000 0x0 0xe0000000
-- 
1.7.3.4

[PATCH 2/2] powerpc/85xx: add a 32-bit P1022DS device tree

[Timur Tabi]

Add a 32-bit version of the device tree for the Freescale P1022DS reference
board.

Signed-off-by: Timur Tabi <timur@freescale.com>
---
 arch/powerpc/boot/dts/p1022ds_32b.dts |  270 +++++++++++++++++++++++++++++++++
 1 files changed, 270 insertions(+), 0 deletions(-)
 create mode 100644 arch/powerpc/boot/dts/p1022ds_32b.dts

diff --git a/arch/powerpc/boot/dts/p1022ds_32b.dts b/arch/powerpc/boot/dts/p1022ds_32b.dts
new file mode 100644
index 0000000..18787d9
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1022ds_32b.dts
@@ -0,0 +1,270 @@
+/*
+ * P1022 DS 32-Bit Physical Address Map Device Tree Source
+ *
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "fsl/p1022si-pre.dtsi"
+/ {
+	model = "fsl,P1022DS";
+	compatible = "fsl,P1022DS";
+
+	memory {
+		device_type = "memory";
+	};
+
+	lbc: localbus@ffe05000 {
+		reg = <0x0 0xffe05000 0 0x1000>;
+		ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
+			  0x1 0x0 0x0 0xe0000000 0x08000000
+			  0x2 0x0 0x0 0xff800000 0x00040000
+			  0x3 0x0 0x0 0xffdf0000 0x00008000>;
+
+		/*
+		 * This node is used to access the pixis via "indirect" mode,
+		 * which is done by writing the pixis register index to chip
+		 * select 0 and the value to/from chip select 1.  Indirect
+		 * mode is the only way to access the pixis when DIU video
+		 * is enabled.  Note that this assumes that the first column
+		 * of the 'ranges' property above is the chip select number.
+		 */
+		board-control@0,0 {
+			compatible = "fsl,p1022ds-indirect-pixis";
+			reg = <0x0 0x0 1	/* CS0 */
+			       0x1 0x0 1>;	/* CS1 */
+		};
+
+		nor@0,0 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			compatible = "cfi-flash";
+			reg = <0x0 0x0 0x8000000>;
+			bank-width = <2>;
+			device-width = <1>;
+
+			partition@0 {
+				reg = <0x0 0x03000000>;
+				label = "ramdisk-nor";
+				read-only;
+			};
+
+			partition@3000000 {
+				reg = <0x03000000 0x00e00000>;
+				label = "diagnostic-nor";
+				read-only;
+			};
+
+			partition@3e00000 {
+				reg = <0x03e00000 0x00200000>;
+				label = "dink-nor";
+				read-only;
+			};
+
+			partition@4000000 {
+				reg = <0x04000000 0x00400000>;
+				label = "kernel-nor";
+				read-only;
+			};
+
+			partition@4400000 {
+				reg = <0x04400000 0x03b00000>;
+				label = "jffs2-nor";
+			};
+
+			partition@7f00000 {
+				reg = <0x07f00000 0x00080000>;
+				label = "dtb-nor";
+				read-only;
+			};
+
+			partition@7f80000 {
+				reg = <0x07f80000 0x00080000>;
+				label = "u-boot-nor";
+				read-only;
+			};
+		};
+
+		nand@2,0 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			compatible = "fsl,elbc-fcm-nand";
+			reg = <0x2 0x0 0x40000>;
+
+			partition@0 {
+				reg = <0x0 0x02000000>;
+				label = "u-boot-nand";
+				read-only;
+			};
+
+			partition@2000000 {
+				reg = <0x02000000 0x10000000>;
+				label = "jffs2-nand";
+			};
+
+			partition@12000000 {
+				reg = <0x12000000 0x10000000>;
+				label = "ramdisk-nand";
+				read-only;
+			};
+
+			partition@22000000 {
+				reg = <0x22000000 0x04000000>;
+				label = "kernel-nand";
+			};
+
+			partition@26000000 {
+				reg = <0x26000000 0x01000000>;
+				label = "dtb-nand";
+				read-only;
+			};
+
+			partition@27000000 {
+				reg = <0x27000000 0x19000000>;
+				label = "reserved-nand";
+			};
+		};
+
+		board-control@3,0 {
+			compatible = "fsl,p1022ds-fpga", "fsl,fpga-ngpixis";
+			reg = <3 0 0x30>;
+			interrupt-parent = <&mpic>;
+			/*
+			 * IRQ8 is generated if the "EVENT" switch is pressed
+			 * and PX_CTL[EVESEL] is set to 00.
+			 */
+			interrupts = <8 8 0 0>;
+		};
+	};
+
+	soc: soc@ffe00000 {
+		ranges = <0x0 0x0 0xffe00000 0x100000>;
+
+		i2c@3100 {
+			wm8776:codec@1a {
+				compatible = "wlf,wm8776";
+				reg = <0x1a>;
+				/*
+				 * clock-frequency will be set by U-Boot if
+				 * the clock is enabled.
+				 */
+			};
+		};
+
+		spi@7000 {
+			flash@0 {
+				#address-cells = <1>;
+				#size-cells = <1>;
+				compatible = "spansion,s25sl12801";
+				reg = <0>;
+				spi-max-frequency = <40000000>; /* input clock */
+
+				partition@0 {
+					label = "u-boot-spi";
+					reg = <0x00000000 0x00100000>;
+					read-only;
+				};
+				partition@100000 {
+					label = "kernel-spi";
+					reg = <0x00100000 0x00500000>;
+					read-only;
+				};
+				partition@600000 {
+					label = "dtb-spi";
+					reg = <0x00600000 0x00100000>;
+					read-only;
+				};
+				partition@700000 {
+					label = "file system-spi";
+					reg = <0x00700000 0x00900000>;
+				};
+			};
+		};
+
+		ssi@15000 {
+			fsl,mode = "i2s-slave";
+			codec-handle = <&wm8776>;
+			fsl,ssi-asynchronous;
+		};
+
+		usb@22000 {
+			phy_type = "ulpi";
+		};
+
+		usb@23000 {
+			status = "disabled";
+		};
+
+		mdio@24000 {
+			phy0: ethernet-phy@0 {
+				interrupts = <3 1 0 0>;
+				reg = <0x1>;
+			};
+			phy1: ethernet-phy@1 {
+				interrupts = <9 1 0 0>;
+				reg = <0x2>;
+			};
+		};
+
+		ethernet@b0000 {
+			phy-handle = <&phy0>;
+			phy-connection-type = "rgmii-id";
+		};
+
+		ethernet@b1000 {
+			phy-handle = <&phy1>;
+			phy-connection-type = "rgmii-id";
+		};
+	};
+
+	pci0: pcie@ffe09000 {
+		reg = <0x0 0xffe09000 0 0x1000>;
+		ranges = <0x2000000 0x0 0xe0000000 0 0xa0000000 0x0 0x20000000
+			  0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+		pcie@0 {
+			ranges = <0x2000000 0x0 0xe0000000
+				  0x2000000 0x0 0xe0000000
+				  0x0 0x20000000
+
+				  0x1000000 0x0 0x0
+				  0x1000000 0x0 0x0
+				  0x0 0x100000>;
+		};
+	};
+
+	pci1: pcie@ffe0a000 {
+		reg = <0 0xffe0a000 0 0x1000>;
+		ranges = <0x2000000 0x0 0xe0000000 0 0xc0000000 0x0 0x20000000
+			  0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
+		pcie@0 {
+			reg = <0x0 0x0 0x0 0x0 0x0>;
+			ranges = <0x2000000 0x0 0xe0000000
+				  0x2000000 0x0 0xe0000000
+				  0x0 0x20000000
+
+				  0x1000000 0x0 0x0
+				  0x1000000 0x0 0x0
+				  0x0 0x100000>;
+		};
+	};
+
+	pci2: pcie@ffe0b000 {
+		reg = <0 0xffe0b000 0 0x1000>;
+		ranges = <0x2000000 0x0 0xe0000000 0 0x80000000 0x0 0x20000000
+			  0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+		pcie@0 {
+			ranges = <0x2000000 0x0 0xe0000000
+				  0x2000000 0x0 0xe0000000
+				  0x0 0x20000000
+
+				  0x1000000 0x0 0x0
+				  0x1000000 0x0 0x0
+				  0x0 0x100000>;
+		};
+	};
+};
+
+/include/ "fsl/p1022si-post.dtsi"
-- 
1.7.3.4

Re: [PATCH 2/2] powerpc/85xx: add a 32-bit P1022DS device tree

[Scott Wood]

On 12/02/2011 04:08 PM, Timur Tabi wrote:
> +	lbc: localbus@ffe05000 {
> +		reg = <0x0 0xffe05000 0 0x1000>;
> +		ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
> +			  0x1 0x0 0x0 0xe0000000 0x08000000
> +			  0x2 0x0 0x0 0xff800000 0x00040000
> +			  0x3 0x0 0x0 0xffdf0000 0x00008000>;
> +
> +		/*
> +		 * This node is used to access the pixis via "indirect" mode,
> +		 * which is done by writing the pixis register index to chip
> +		 * select 0 and the value to/from chip select 1.  Indirect
> +		 * mode is the only way to access the pixis when DIU video
> +		 * is enabled.  Note that this assumes that the first column
> +		 * of the 'ranges' property above is the chip select number.
> +		 */
> +		board-control@0,0 {
> +			compatible = "fsl,p1022ds-indirect-pixis";
> +			reg = <0x0 0x0 1	/* CS0 */
> +			       0x1 0x0 1>;	/* CS1 */
> +		};
> +
> +		nor@0,0 {
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			compatible = "cfi-flash";
> +			reg = <0x0 0x0 0x8000000>;
> +			bank-width = <2>;
> +			device-width = <1>;
[snip]
> +		};
> +
> +		nand@2,0 {
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			compatible = "fsl,elbc-fcm-nand";
> +			reg = <0x2 0x0 0x40000>;
[snip]
> +			};
> +		};
> +
> +		board-control@3,0 {
> +			compatible = "fsl,p1022ds-fpga", "fsl,fpga-ngpixis";
> +			reg = <3 0 0x30>;
> +			interrupt-parent = <&mpic>;
> +			/*
> +			 * IRQ8 is generated if the "EVENT" switch is pressed
> +			 * and PX_CTL[EVESEL] is set to 00.
> +			 */
> +			interrupts = <8 8 0 0>;
> +		};
> +	};
[snip]
> +/include/ "fsl/p1022si-post.dtsi"

Please add something after post to strip simple-bus off of the localbus
node's compatible.  Either you have board-control@0,0, or you have the
other stuff (did you ever find out what the situation with NAND is?) --
not both at the same time.  Or do you have U-Boot patching in status
updates now?

I realize this isn't a 32-bit versus 36-bit issue, but this seemed as
good a time as any to repeat this complaint. :-)

-Scott

Re: [PATCH 2/2] powerpc/85xx: add a 32-bit P1022DS device tree

[Timur Tabi]

Scott Wood wrote:

> Please add something after post to strip simple-bus off of the localbus
> node's compatible.  Either you have board-control@0,0, or you have the
> other stuff (did you ever find out what the situation with NAND is?) --
> not both at the same time.  Or do you have U-Boot patching in status
> updates now?

I posted a Linux patch that disables the NOR flash node if video needs to be enabled. 

http://patchwork.ozlabs.org/patch/126459/

However, I only now notice that Kumar requested some changes.

-- 
Timur Tabi
Linux kernel developer at Freescale

Re: [PATCH 2/2] powerpc/85xx: add a 32-bit P1022DS device tree

[Scott Wood]

On 12/02/2011 04:24 PM, Timur Tabi wrote:
> Scott Wood wrote:
> 
>> Please add something after post to strip simple-bus off of the localbus
>> node's compatible.  Either you have board-control@0,0, or you have the
>> other stuff (did you ever find out what the situation with NAND is?) --
>> not both at the same time.  Or do you have U-Boot patching in status
>> updates now?
> 
> I posted a Linux patch that disables the NOR flash node if video needs to be enabled. 
> 
> http://patchwork.ozlabs.org/patch/126459/
> 
> However, I only now notice that Kumar requested some changes.

Nothing that happens in Linux excuses handing Linux a device tree that
is wrong.  That you need special handling in Linux indicates that this
is not a simple-bus.

-Scott

Re: [PATCH 2/2] powerpc/85xx: add a 32-bit P1022DS device tree

[Kumar Gala]

On Dec 2, 2011, at 4:08 PM, Timur Tabi wrote:

> Add a 32-bit version of the device tree for the Freescale P1022DS =
reference
> board.
>=20
> Signed-off-by: Timur Tabi <timur@freescale.com>
> ---
> arch/powerpc/boot/dts/p1022ds_32b.dts |  270 =
+++++++++++++++++++++++++++++++++
> 1 files changed, 270 insertions(+), 0 deletions(-)
> create mode 100644 arch/powerpc/boot/dts/p1022ds_32b.dts

look at how mpc8572ds handles 36b.dts we put common definitions in a =
shared file.

- k=

Re: [PATCH 2/2] powerpc/85xx: add a 32-bit P1022DS device tree

[Timur Tabi]

Scott Wood wrote:

> Nothing that happens in Linux excuses handing Linux a device tree that
> is wrong.  That you need special handling in Linux indicates that this
> is not a simple-bus.

How about this:

diff --git a/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi b/arch/powerpc/boot/dts
index 16239b1..2a62edd 100644
--- a/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
@@ -35,7 +35,11 @@
 &lbc {
        #address-cells = <2>;
        #size-cells = <1>;
-       compatible = "fsl,p1022-elbc", "fsl,elbc", "simple-bus";
+       /*
+        * The localbus on the P1022 is not a simple-bus because of the eLBC
+        * pin muxing when the DIU is enabled.
+        */
+       compatible = "fsl,p1022-elbc", "fsl,elbc";
        interrupts = <19 2 0 0>;
 };
 
-- 
Timur Tabi
Linux kernel developer at Freescale

Re: [PATCH 2/2] powerpc/85xx: add a 32-bit P1022DS device tree

[Scott Wood]

On 12/02/2011 05:41 PM, Timur Tabi wrote:
> Scott Wood wrote:
> 
>> Nothing that happens in Linux excuses handing Linux a device tree that
>> is wrong.  That you need special handling in Linux indicates that this
>> is not a simple-bus.
> 
> How about this:
> 
> diff --git a/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi b/arch/powerpc/boot/dts
> index 16239b1..2a62edd 100644
> --- a/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
> @@ -35,7 +35,11 @@
>  &lbc {
>         #address-cells = <2>;
>         #size-cells = <1>;
> -       compatible = "fsl,p1022-elbc", "fsl,elbc", "simple-bus";
> +       /*
> +        * The localbus on the P1022 is not a simple-bus because of the eLBC
> +        * pin muxing when the DIU is enabled.
> +        */
> +       compatible = "fsl,p1022-elbc", "fsl,elbc";
>         interrupts = <19 2 0 0>;
>  };
>  

OK.

-Scott

Re: [PATCH 2/2] powerpc/85xx: add a 32-bit P1022DS device tree

[Timur Tabi]

Kumar Gala wrote:
> look at how mpc8572ds handles 36b.dts we put common definitions in a shared file.

Ok, I've made those changes, but when I boot the kernel, I'm seeing this.  Can you give me a clue as to what's wrong?

PCI: Probing PCI hardware                                                       
pci 0000:00:00.0: [1957:0110] type 1 class 0x000b20                             
pci 0000:00:00.0: ignoring class b20 (doesn't match header type 01)             
pci 0000:00:00.0: supports D1 D2                                                
pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot D3cold                     
pci 0000:00:00.0: PME# disabled                                                 
pci 0000:00:00.0: PCI bridge to [bus 01-ff]                                     
pci 0001:02:00.0: [1957:0110] type 1 class 0x000b20                             
pci 0001:02:00.0: ignoring class b20 (doesn't match header type 01)             
pci 0001:02:00.0: supports D1 D2                                                
pci 0001:02:00.0: PME# supported from D0 D1 D2 D3hot D3cold                     
pci 0001:02:00.0: PME# disabled                                                 
pci 0001:02:00.0: PCI bridge to [bus 03-ff]                                     
pci 0002:04:00.0: [1957:0110] type 1 class 0x000b20                             
pci 0002:04:00.0: ignoring class b20 (doesn't match header type 01)             
pci 0002:04:00.0: supports D1 D2                                                
pci 0002:04:00.0: PME# supported from D0 D1 D2 D3hot D3cold                     
pci 0002:04:00.0: PME# disabled                                                 
pci 0002:05:00.0: [8086:10d3] type 0 class 0x000200                             
pci 0002:05:00.0: reg 10: [mem 0x80000000-0x8001ffff]                           
pci 0002:05:00.0: reg 14: [mem 0x80080000-0x800fffff]                           
pci 0002:05:00.0: reg 18: [io  0x1000-0x101f]                                   
pci 0002:05:00.0: reg 1c: [mem 0x80100000-0x80103fff]                           
pci 0002:05:00.0: reg 30: [mem 0x00000000-0x0003ffff pref]                      
pci 0002:05:00.0: PME# supported from D0 D3hot D3cold                           
pci 0002:05:00.0: PME# disabled                                                 
pci 0002:04:00.0: PCI bridge to [bus 05-ff]                                     
pci 0002:04:00.0:   bridge window [mem 0x80000000-0x801fffff]                   
PCI: Cannot allocate resource region 0 of device 0002:05:00.0, will remap       
PCI: Cannot allocate resource region 1 of device 0002:05:00.0, will remap       
PCI: Cannot allocate resource region 3 of device 0002:05:00.0, will remap       
PCI 0000:00 Cannot reserve Legacy IO [io  0xffbed000-0xffbedfff]                
PCI 0001:02 Cannot reserve Legacy IO [io  0xffbdb000-0xffbdbfff]                
PCI 0002:04 Cannot reserve Legacy IO [io  0xffbc9000-0xffbc9fff]                
PCI: max bus depth: 1 pci_try_num: 2                                            
pci 0000:00:00.0: PCI bridge to [bus 01-01]                                     
pci 0000:00:00.0:   bridge window [io  0xffbed000-0xffbfcfff]                   
pci 0000:00:00.0:   bridge window [mem 0xa0000000-0xbfffffff]                   
pci 0001:02:00.0: PCI bridge to [bus 03-03]                                     
pci 0001:02:00.0:   bridge window [io  0xffbdb000-0xffbeafff]                   
pci 0001:02:00.0:   bridge window [mem 0xc0000000-0xdfffffff]                   
pci 0002:04:00.0: BAR 9: can't assign mem pref (size 0x100000)                  
pci 0002:05:00.0: BAR 1: assigned [mem 0x80000000-0x8007ffff]                   
pci 0002:05:00.0: BAR 1: set to [mem 0x80000000-0x8007ffff] (PCI address [0xe000
0000-0xe007ffff])                                                               
pci 0002:05:00.0: BAR 6: assigned [mem 0x80080000-0x800bffff pref]              
pci 0002:05:00.0: BAR 0: assigned [mem 0x800c0000-0x800dffff]                   
pci 0002:05:00.0: BAR 0: set to [mem 0x800c0000-0x800dffff] (PCI address [0xe00c
0000-0xe00dffff])                                                               
pci 0002:05:00.0: BAR 3: assigned [mem 0x800e0000-0x800e3fff]                   
pci 0002:05:00.0: BAR 3: set to [mem 0x800e0000-0x800e3fff] (PCI address [0xe00e
0000-0xe00e3fff])                                                               
pci 0002:04:00.0: PCI bridge to [bus 05-05]                                     
pci 0002:04:00.0:   bridge window [io  0xffbc9000-0xffbd8fff]                   
pci 0002:04:00.0:   bridge window [mem 0x80000000-0x9fffffff]                   
pci 0000:00:00.0: enabling device (0106 -> 0107)                                
pci 0001:02:00.0: enabling device (0106 -> 0107)                                
pci 0002:04:00.0: enabling device (0106 -> 0107)                                
pci_bus 0000:00: resource 0 [io  0xffbed000-0xffbfcfff]                         
pci_bus 0000:00: resource 1 [mem 0xa0000000-0xbfffffff]                         
pci_bus 0000:01: resource 0 [io  0xffbed000-0xffbfcfff]                         
pci_bus 0000:01: resource 1 [mem 0xa0000000-0xbfffffff]                         
pci_bus 0001:02: resource 0 [io  0xffbdb000-0xffbeafff]                         
pci_bus 0001:02: resource 1 [mem 0xc0000000-0xdfffffff]                         
pci_bus 0001:03: resource 0 [io  0xffbdb000-0xffbeafff]                         
pci_bus 0001:03: resource 1 [mem 0xc0000000-0xdfffffff]                         
pci_bus 0002:04: resource 0 [io  0xffbc9000-0xffbd8fff]                         
pci_bus 0002:04: resource 1 [mem 0x80000000-0x9fffffff]                         
pci_bus 0002:05: resource 0 [io  0xffbc9000-0xffbd8fff]                         
pci_bus 0002:05: resource 1 [mem 0x80000000-0x9fffffff]        

-- 
Timur Tabi
Linux kernel developer at Freescale