From: Scott Wood <scottwood@freescale.com>
To: <shuo.liu@freescale.com>
Cc: Artem.Bityutskiy@nokia.com, linuxppc-dev@lists.ozlabs.org,
linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org,
akpm@linux-foundation.org, dwmw2@infradead.org
Subject: Re: [PATCH 2/2 v4] mtd/nand : workaround for Freescale FCM to support large-page Nand chip
Date: Fri, 9 Dec 2011 13:24:59 -0600 [thread overview]
Message-ID: <4EE2608B.4000103@freescale.com> (raw)
In-Reply-To: <1323423775-26951-2-git-send-email-shuo.liu@freescale.com>
On 12/09/2011 03:42 AM, shuo.liu@freescale.com wrote:
> From: Liu Shuo <shuo.liu@freescale.com>
>
> Freescale FCM controller has a 2K size limitation of buffer RAM. In order
> to support the Nand flash chip whose page size is larger than 2K bytes,
> we read/write 2k data repeatedly by issuing FIR_OP_RB/FIR_OP_WB and save
> them to a large buffer.
>
> Signed-off-by: Liu Shuo <shuo.liu@freescale.com>
> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> ---
> v4 : allocate (8+1)k buffer for large page chip.
>
> drivers/mtd/nand/fsl_elbc_nand.c | 246 ++++++++++++++++++++++++++++++++++----
> 1 files changed, 221 insertions(+), 25 deletions(-)
Again, I think we need to sort out the bad block migration first -- at
least how we're going to mark the chip as having been migrated, so the
driver can check for it.
-Scott
next prev parent reply other threads:[~2011-12-09 19:25 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-12-09 9:42 [PATCH 1/2] mtd/nand : set Nand flash page address to FBAR and FPAR correctly shuo.liu
2011-12-09 9:42 ` [PATCH 2/2 v4] mtd/nand : workaround for Freescale FCM to support large-page Nand chip shuo.liu
2011-12-09 19:24 ` Scott Wood [this message]
2011-12-09 19:23 ` [PATCH 1/2] mtd/nand : set Nand flash page address to FBAR and FPAR correctly Scott Wood
2011-12-12 21:04 ` Artem Bityutskiy
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