From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from TX2EHSOBE006.bigfish.com (tx2ehsobe003.messaging.microsoft.com [65.55.88.13]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (Client CN "mail.global.frontbridge.com", Issuer "Microsoft Secure Server Authority" (verified OK)) by ozlabs.org (Postfix) with ESMTPS id 777521007D5 for ; Wed, 14 Dec 2011 19:37:00 +1100 (EST) Message-ID: <4EE8612C.9050104@freescale.com> Date: Wed, 14 Dec 2011 16:41:16 +0800 From: LiuShuo MIME-Version: 1.0 To: Scott Wood , Subject: Re: [PATCH 3/3] mtd/nand : workaround for Freescale FCM to support large-page Nand chip References: <1322973098-2528-1-git-send-email-shuo.liu@freescale.com> <1322973098-2528-3-git-send-email-shuo.liu@freescale.com> <4EDEAEB9.6020703@freescale.com> <1323724195.2297.11.camel@koala> <4EE66EFE.1050608@freescale.com> <1323724784.2297.20.camel@koala> <4EE6725C.3050706@freescale.com> <4EE6BC9B.4000602@freescale.com> In-Reply-To: <4EE6BC9B.4000602@freescale.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Cc: Artem.Bityutskiy@nokia.com, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, shuo.liu@freescale.com, linux-mtd@lists.infradead.org, akpm@linux-foundation.org, dwmw2@infradead.org List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , =E4=BA=8E 2011=E5=B9=B412=E6=9C=8813=E6=97=A5 10:46, LiuShuo =E5=86=99=E9= =81=93: > =E4=BA=8E 2011=E5=B9=B412=E6=9C=8813=E6=97=A5 05:30, Scott Wood =E5=86=99= =E9=81=93: >> On 12/12/2011 03:19 PM, Artem Bityutskiy wrote: >>> On Mon, 2011-12-12 at 15:15 -0600, Scott Wood wrote: >>>> NAND chips come from the factory with bad blocks marked at a certain >>>> offset into each page. This offset is normally in the OOB area, but >>>> since we change the layout from "4k data, 128 byte oob" to "2k=20 >>>> data, 64 >>>> byte oob, 2k data, 64 byte oob" the marker is no longer in the=20 >>>> oob. On >>>> first use we need to migrate the markers so that they are still in=20 >>>> the oob. >>> Ah, I see, thanks. Are you planning to implement in-kernel migration = or >>> use a user-space tool? >> That's the kind of answer I was hoping to get from Shuo. :-) > OK, I try to do this. Wait for a couple of days. > > -LiuShuo I found it's too complex to do the migration in Linux driver. Maybe we can add a uboot command (e.g. nand bbmigrate) to do it, once is=20 enough. And let user ensure it been completed before linux use the Nand flash chi= p. Even if we don't do the migration, the bad block also can be marked as ba= d by wearing. So, do we really need to take much time to implement it ? (code looks too complex.) -LiuShuo >> Most likely is a firmware-based tool, but I'd like there to be some wa= y >> for the tool to mark that this has happened, so that the Linux driver >> can refuse to do non-raw accesses to a chip that isn't marked as havin= g >> been migrated (or at least yell loudly in the log). >> >> Speaking of raw accesses, these are currently broken in the eLBC >> driver... we need some way for the generic layer to tell us what kind = of >> access it is before the transaction starts, not once it wants to read >> out the buffer (unless we add more hacks to delay the start of a read >> transaction until first buffer access...). We'd be better off with a >> high-level "read page/write page" function that does the whole thing >> (not just buffer access, but command issuance as well). >> >> -Scott >