FSL SPI driver question

FSL SPI driver question

[Bruce_Leonard]

Good afternoon,

I'm using the 3.0.3 kernel running on an MPC8308 and am trying to 
interface to a Cypress CY14B256Q2A non-volatile RAM via SPI.  I've got the 
SPI infrastructure, the Freescale SPI driver (drivers/spi/spi_fsl_spi.c), 
and spidev built into the kernel and everything on the user space/kernel 
side appears to be working correctly (at least when I try to read the 
NvRAM's config register all the right places in the kernel get hit and I 
see the SPI signals active with an o-scope).

I think what I'm hitting is a lack of understanding/documentation on the 
SPI controller in the 8308.  To read data from the NvRAM, the Master (the 
8308 in this case) needs to clock out a byte long "read" command, two 
bytes of address, and then clock in the data from the NvRAM.  However, I 
never get any data back.  I think the problem is that (direct quote from 
the 8308 reference manual) "SPICLK is a gated clock, active only during 
data transfers".  So once the read command and address are sent, the 8308 
considers the data transfer complete and gates off SPICLK.  Without 
SPICLK, the NvRAM has no way to clock out it's data.  I think it's ready 
to, it just can't.

So the question is, how do I use spidev (or any other means) to get the 
8308 SPI controller to keep SPICLK active so that the output data from the 
NvRAM gets clocked out to the 8308?

Thanks.

Bruce

Re: FSL SPI driver question

[Norbert van Bolhuis]

On 01/25/12 01:11, Bruce_Leonard@selinc.com wrote:
> Good afternoon,
>
> I'm using the 3.0.3 kernel running on an MPC8308 and am trying to
> interface to a Cypress CY14B256Q2A non-volatile RAM via SPI.  I've got the
> SPI infrastructure, the Freescale SPI driver (drivers/spi/spi_fsl_spi.c),
> and spidev built into the kernel and everything on the user space/kernel
> side appears to be working correctly (at least when I try to read the
> NvRAM's config register all the right places in the kernel get hit and I
> see the SPI signals active with an o-scope).
>
> I think what I'm hitting is a lack of understanding/documentation on the
> SPI controller in the 8308.  To read data from the NvRAM, the Master (the
> 8308 in this case) needs to clock out a byte long "read" command, two
> bytes of address, and then clock in the data from the NvRAM.  However, I
> never get any data back.  I think the problem is that (direct quote from
> the 8308 reference manual) "SPICLK is a gated clock, active only during
> data transfers".  So once the read command and address are sent, the 8308
> considers the data transfer complete and gates off SPICLK.  Without
> SPICLK, the NvRAM has no way to clock out it's data.  I think it's ready
> to, it just can't.
>
> So the question is, how do I use spidev (or any other means) to get the
> 8308 SPI controller to keep SPICLK active so that the output data from the
> NvRAM gets clocked out to the 8308?
>
> Thanks.
>
> Bruce


Did you see Documentation/spi/spidev_fdx.c:do_msg ?
it perform a full-duplex (actually half-duplex) 1 byte transfer.

In your case you need a transfer that outputs 3 bytes (read cmd + address)
and inputs 1? byte.

If you do it this way I would expect the SPICLK to be active
during the 2nd part of the transfer (whenever the CPU "reads" the
data from SPI client).

hth.

---
NvBolhuis

Re: FSL SPI driver question

[Bruce_Leonard]

Hi Norbert,

> >
> > So the question is, how do I use spidev (or any other means) to get 
the
> > 8308 SPI controller to keep SPICLK active so that the output data from 
the
> > NvRAM gets clocked out to the 8308?
> >
> 
> Did you see Documentation/spi/spidev_fdx.c:do_msg ?
> it perform a full-duplex (actually half-duplex) 1 byte transfer.
> 
> In your case you need a transfer that outputs 3 bytes (read cmd + 
address)
> and inputs 1? byte.
> 
> If you do it this way I would expect the SPICLK to be active
> during the 2nd part of the transfer (whenever the CPU "reads" the
> data from SPI client).
> 

Thanks for the reply.  Yes I did find spidev_fdx.c and in fact copied it 
for my tests.  I still see SPICLK active only during the time the 8308 is 
sending data (read cmd + address).  Nothing happens with the clock after 
that when the NvRAM is ready to send data.

Bruce

Re: FSL SPI driver question

[Norbert van Bolhuis]

Hi Bruce,


On 01/25/12 20:49, Bruce_Leonard@selinc.com wrote:
.
.
.
> Thanks for the reply.  Yes I did find spidev_fdx.c and in fact copied it
> for my tests.  I still see SPICLK active only during the time the 8308 is
> sending data (read cmd + address).  Nothing happens with the clock after
> that when the NvRAM is ready to send data.
>
> Bruce
>


ok, then I don't know.

I doubt this is a spidev or FSP SPI driver problem though.

Questions like:

Could it be a HW problem ?
Is the correct SPI mode used ?
Does it work in u-boot ?

Come to mind in a situation like this.


Norbert.

Re: FSL SPI driver question

[Bruce_Leonard]

Norbert,

> 
> ok, then I don't know.
> 
> I doubt this is a spidev or FSP SPI driver problem though.
> 
> Questions like:
> 
> Could it be a HW problem ?
> Is the correct SPI mode used ?
> Does it work in u-boot ?
> 
> Come to mind in a situation like this.
> 

Thanks for the suggestions.  I finally found it in the wee hours this 
morning, and it was operator error.  The CY14 by default powers up in the 
write protect state and from the factory is erased to all zeros.  So my 
writes and subsequent reads appeared to fail by the "fact" that I could 
never read what I wrote.  Guess I need better reading glasses in my old 
age :-/

Anyway, I'm happily up and talking using the Freescale SPI driver and 
spidev.  Thanks for the help and sorry for the noise on the list.

Bruce