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* [PATCH] powerpc/fsl: add PAMUBYPENR register definition to fsl_guts.h
@ 2012-02-06 19:17 Timur Tabi
  2012-02-07 18:21 ` Kumar Gala
  2012-02-08  2:13 ` Question about fsl_pq_mdio_probe and dts file for p1010rdb Bob Cochran
  0 siblings, 2 replies; 4+ messages in thread
From: Timur Tabi @ 2012-02-06 19:17 UTC (permalink / raw)
  To: galak, linuxppc-dev

Add a defintion of register PAMUBYPENR (offset 0x604) to the global
utilities structure.

PAMUBYPENR is the PAMU bypass enable register.  It contains control
bits for enabling bypass mode on each PAMU.

Signed-off-by: Timur Tabi <timur@freescale.com>
---
 arch/powerpc/include/asm/fsl_guts.h |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/include/asm/fsl_guts.h b/arch/powerpc/include/asm/fsl_guts.h
index bebd124..a9a85ef 100644
--- a/arch/powerpc/include/asm/fsl_guts.h
+++ b/arch/powerpc/include/asm/fsl_guts.h
@@ -85,7 +85,9 @@ struct ccsr_guts_86xx {
 	u8	res0c4[0x224 - 0xc4];
 	__be32  iodelay1;	/* 0x.0224 - IO delay control register 1 */
 	__be32  iodelay2;	/* 0x.0228 - IO delay control register 2 */
-	u8	res22c[0x800 - 0x22c];
+	u8	res22c[0x604 - 0x22c];
+	__be32	pamubypenr;	/* 0x.0604 - PAMU bypass enable register */
+	u8	res608[0x800 - 0x608];
 	__be32	clkdvdr;	/* 0x.0800 - Clock Divide Register */
 	u8	res804[0x900 - 0x804];
 	__be32	ircr;		/* 0x.0900 - Infrared Control Register */
-- 
1.7.3.4

^ permalink raw reply related	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2012-02-08  3:14 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2012-02-06 19:17 [PATCH] powerpc/fsl: add PAMUBYPENR register definition to fsl_guts.h Timur Tabi
2012-02-07 18:21 ` Kumar Gala
2012-02-07 19:25   ` Timur Tabi
2012-02-08  2:13 ` Question about fsl_pq_mdio_probe and dts file for p1010rdb Bob Cochran

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