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* [PATCH] P1021: set IReady in QE Microcode Upload
@ 2011-11-11 16:05 Kokoris, Ioannis
  2011-11-11 16:39 ` Tabi Timur-B04825
  2012-07-10 12:24 ` Kumar Gala
  0 siblings, 2 replies; 12+ messages in thread
From: Kokoris, Ioannis @ 2011-11-11 16:05 UTC (permalink / raw)
  To: timur@freescale.com
  Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org

Hi,

QE Microcode Initialization using qe_upload_microcode() does not work on P1=
021 if the IRAM-Ready register is not set after the microcode upload. This =
patch adds a definition for the "I-RAM Ready" register and sets it uppon mi=
crocode upload completion.


Signed-off-by: Ioannis Kokkoris <ioannis.kokoris@siemens-enterprise.com>


diff -Nru a/arch/powerpc/include/asm/immap_qe.h b/arch/powerpc/include/asm/=
immap_qe.h
--- a/arch/powerpc/include/asm/immap_qe.h	2011-11-11 17:47:45.000000000 +02=
00
+++ b/arch/powerpc/include/asm/immap_qe.h	2011-11-11 17:49:31.000000000 +02=
00
@@ -26,7 +26,9 @@
 struct qe_iram {
 	__be32	iadd;		/* I-RAM Address Register */
 	__be32	idata;		/* I-RAM Data Register */
-	u8	res0[0x78];
+	u8	res0[0x04];
+	__be32	iready;		/* I-RAM Ready Register */
+	u8	res1[0x70];
 } __attribute__ ((packed));
=20
 /* QE Interrupt Controller */
diff -Nru a/arch/powerpc/include/asm/qe.h b/arch/powerpc/include/asm/qe.h
--- a/arch/powerpc/include/asm/qe.h	2011-11-11 17:47:57.000000000 +0200
+++ b/arch/powerpc/include/asm/qe.h	2011-11-11 17:49:42.000000000 +0200
@@ -499,6 +499,7 @@
 /* I-RAM */
 #define QE_IRAM_IADD_AIE	0x80000000	/* Auto Increment Enable */
 #define QE_IRAM_IADD_BADDR	0x00080000	/* Base Address */
+#define QE_IRAM_READY           0x80000000      /* Ready */
=20
 /* UPC */
 #define UPGCR_PROTOCOL	0x80000000	/* protocol ul2 or pl2 */
diff -Nru a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe=
.c
--- a/arch/powerpc/sysdev/qe_lib/qe.c	2011-11-11 17:48:44.000000000 +0200
+++ b/arch/powerpc/sysdev/qe_lib/qe.c	2011-11-11 17:49:59.000000000 +0200
@@ -377,6 +377,9 @@
=20
 	for (i =3D 0; i < be32_to_cpu(ucode->count); i++)
 		out_be32(&qe_immr->iram.idata, be32_to_cpu(code[i]));
+=09
+	/* Set I-RAM Ready Register */=09
+	out_be32(&qe_immr->iram.iready, be32_to_cpu(QE_IRAM_READY));
 }
=20
 /*
--

Best Regards,
Ioannis

^ permalink raw reply	[flat|nested] 12+ messages in thread

end of thread, other threads:[~2012-07-10 12:24 UTC | newest]

Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2011-11-11 16:05 [PATCH] P1021: set IReady in QE Microcode Upload Kokoris, Ioannis
2011-11-11 16:39 ` Tabi Timur-B04825
2011-11-14  8:55   ` Kokoris, Ioannis
2011-11-16  3:02     ` Tabi Timur-B04825
2011-11-24  7:55       ` Kumar Gala
2011-11-24 13:57         ` Tabi Timur-B04825
2012-03-16 15:21           ` Kumar Gala
2012-03-16 16:07             ` Timur Tabi
2012-06-29 19:23               ` Kumar Gala
2012-06-29 19:26                 ` Timur Tabi
2012-07-02 18:19                 ` Timur Tabi
2012-07-10 12:24 ` Kumar Gala

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