From: "bhanu jampala" <adams.ppc@gmail.com>
To: linuxppc-embedded@ozlabs.org
Subject: cpm_dpalloc questions
Date: Wed, 27 Aug 2008 22:12:51 -0700 [thread overview]
Message-ID: <4a21eaea0808272212y6be97789nb6b94dd1d4987881@mail.gmail.com> (raw)
Hi Guys,
I am working on MCC HDLC controller on MCC8260. I have two important questions:
1. What is the range of DPRAM from which the cpm_dpalloc allocates memory?
How does the cpm_dpalloc work?
I need this because, I need to reserve the DPRAM memory for MCC2
from (128 * 60) to (255 * 60)
for channels ranging from 128 - 255.
2. PROFF_SMC1 pointer placed at 0 , 64 offsets. is this not an area of
MCC1 controller?
how if I want to use the MCC channel on MCC1.
In file include/asm-powerpc/cpm2.h.
/* The SMCs are relocated to any of the first eight DPRAM pages.
* We will fix these at the first locations of DPRAM, until we
* get some microcode patches :-).
* The parameter ram space for the SMCs is fifty-some bytes, and
* they are required to start on a 64 byte boundary.
*/
#define PROFF_SMC1 (0)
#define PROFF_SMC2 (64)
Regards,
Adams
next reply other threads:[~2008-08-28 5:12 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-08-28 5:12 bhanu jampala [this message]
2008-08-28 16:23 ` cpm_dpalloc questions Scott Wood
2008-08-28 19:03 ` bhanu jampala
2008-08-29 21:25 ` bhanu jampala
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