From: "bhanu jampala" <adams.ppc@gmail.com>
To: "Scott Wood" <scottwood@freescale.com>
Cc: linuxppc-embedded@ozlabs.org
Subject: Re: cpm_dpalloc questions
Date: Thu, 28 Aug 2008 13:03:42 -0600 [thread overview]
Message-ID: <4a21eaea0808281203x78a05bb4l4fbd287db4fe59c5@mail.gmail.com> (raw)
In-Reply-To: <48B6D107.30106@freescale.com>
Hi Scott,
> No, MCC1 PRAM starts at offset 0x8700. Any other areas used are under
> software control.
Yes, you are right. But, I was refereing to MCC channel specific HDLC
parameters.
Reason: I am using the MCC2 which uses memory from offset 0x2000 to
0x4000 for Chan Specific parameters.
you can see that in MCC chapter i.e. 29.3.1 on a MPC8280 manual.
(channel specific HDLC parameters)
I need to make sure that cpm_dpalloc is not using this part of DPRAM
to allocate memory.
I just wanne make sure no other device driver that use cpm_dpalloc to
allocate memory for their BDs i.e. scc, smc, fcc.
and it looks to me like it is allocating me memory starting from 0x128 or 0x400.
> This is obsolete arch/ppc stuff and should be removed; the SMC pram is now
> dynamically allocated and relocated (and before that, it came from the
> device tree).
Yes, I am using 2.6.19.2. I am right now in the middle of finalizing
the BSP port. So, I cannot move on further to device trees. I will
doing that stuff with in a month but now I am with 2.6.19.2.
Regards,
Adams
next prev parent reply other threads:[~2008-08-28 19:03 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-08-28 5:12 cpm_dpalloc questions bhanu jampala
2008-08-28 16:23 ` Scott Wood
2008-08-28 19:03 ` bhanu jampala [this message]
2008-08-29 21:25 ` bhanu jampala
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