/*
 * Media5200 touchscreen driver
 *
 * Copyright (c) 2006 Freescale
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License version 2 as published by
 * the Free Software Foundation.
 */

/*
	File : "mpc5200_ts_spi.h"
	Summary: spi header file


*/

#ifndef __MPC5200_TS_SPI_H
#define __MPC5200_TS_SPI_H

/* headers */
#include "mpc5200_ts_common.h"
#include "mpc5200_ts_spi_dfn.h"

typedef struct SPI_Config_Type
{
    u8  SPI_Master;      /* 1 =  SPI device is Master; */
                             /* 0 = SPI device is Slave */
    u8  ClockPolarity;   /* 1 = Active-low clocks selected;*/ 
                             /* 0 = Active-high clocks selected */
    u8  ClockPhase;      /* Clock Phase */
    u8  WiredOR;         /* 1 = Wired-OR mode */
    u8  SPI_Enable;      /* 1 = SPI system enable */
    u8  SSoutput;        /* 1 = SS as general-purpose output*/
    u32 BaudRate;        /* Baud Rate ,the unit is KHz */ 
} SPI_Config_T;


typedef struct ClockDivisor_Type
{
    u8    reg_value;    /* The corresponding register value */
    u16    clockdivisor; /* Clock Divisor */
} ClockDivisor_T;


/* The following are default values of SPI configuration : code review */
#define SPI_MASTER_DEFAULT                  1
#define SPI_CPOL_DEFAULT                    1
#define SPI_CPHA_DEFAULT                    1
#define SPI_WOR_DEFAULT                     1
#define SPI_SPE_DEFAULT                     1
#define SPI_SSOE_DEFAULT                    1   /*WeiWei add it for SSOE bit */
//#define SPI_BAUD_DEFAULT                  206250 // with 66MHZ clock, should yield 320 divisor .. this may solve errata sheet where SPIF set before data ready below 200KHZ 50000
#define SPI_BAUD_DEFAULT                  128900 // with 132MHz bus, 1024
//#define SPI_BAUD_DEFAULT                  50000
#define RCVBUF_SIZE_DEFAULT               512
#define RCVBUF_MIN_SIZE                   4
#define RCVBUF_MAX_SIZE                   4096
#define MSG_MAX_SIZE                      2048
#define BUFSIZE                           512

/* setting for module clock is now 132MHZ for Media5200 */
#define SPI_MODULE_CLOCK                  132000000

#define SPI_DIVISOR_NUM                   36
#define NANOSECS_PER_WRITE                1000000
#define NANOSECS_FOR_WCOL                 1000000
#define LOOPS                             10


/* Clock Divisor Selections Array. All clock divisor selections the spi driver 
 * can support are arranged between 640 to 2048 in ascending order. The supported 
 * baudrate range will rely on the SPI module clock( system clock).  
 * Given 66MHz system clock, the baudrate ranged between 33000Hz to 100000Hz.
 */
/* For memory leak : up the baud rate to 100KHz */
ClockDivisor_T Clock_Divisor[SPI_DIVISOR_NUM] =
{ { 0x45, 320},{ 0x46, 640 }, { 0x56, 768 }, { 0x66, 896 }, { 0x76, 1024 }, { 0x47, 1280 }, { 0x57, 1536 },{ 0x67, 1792}, { 0x77, 2048 } };





SPI_Regs_T		*SPI_Regs; /* spi register struct */



/* public function prototyping */
int spi_init (void);
int write_spi(u8 *buffer, u32 nbytes);
int read_spi(u8 *buffer, u32 nbytes);

/* private functions prototyping */
static int SPI_SetConfig(SPI_Config_T * Config_Ptr );
static int SPI_SetBaudrate( u32 BaudRate);

#endif