Re: [PASEMI] Nemo board doesn't boot anymore because of moving pas_pci_init

[Christian Zigotzky <chzigotzky@xenosoft.de>]

On 24 February 21 at 03:17am, Oliver O'Halloran wrote:
> On Wed, Feb 24, 2021 at 11:55 AM Michael Ellerman <mpe@ellerman.id.au> wrote:
>> Olof Johansson <olof@lixom.net> writes:
>>> Hi,
>>>
>>> On Tue, Feb 23, 2021 at 1:43 PM Christian Zigotzky
>>> <chzigotzky@xenosoft.de> wrote:
>>>> Hello,
>>>>
>>>> The Nemo board [1] with a P.A. Semi PA6T SoC doesn't boot anymore
>>>> because of moving "pas_pci_init" to the device tree adoption [2] in the
>>>> latest PowerPC updates 5.12-1 [3].
>>>>
>>>> Unfortunately the Nemo board doesn't have it in its device tree. I
>>>> reverted this commit and after that the Nemo board boots without any
>>>> problems.
>>>>
>>>> What do you think about this ifdef?
>>>>
>>>> #ifdef CONFIG_PPC_PASEMI_NEMO
>>>>           /*
>>>>            * Check for the Nemo motherboard here, if we are running on one
>>>>            * then pas_pci_init()
>>>>            */
>>>>           if (of_machine_is_compatible("pasemi,nemo")) {
>>>>                   pas_pci_init();
>>>>           }
>>>> #endif
>>> This is not a proper fix for the problem. Someone will need to debug
>>> what on the pas_pci_init() codepath still needs to happen early in the
>>> boot, even if the main PCI setup happens later.
>> I looked but don't see anything 100% obvious.
>>
>> Possibly it's the call to isa_bridge_find_early()?
> Looks like it. I think the problem stems from the use of the PIO
> helpers (mainly outb()) in i8259_init() which is called from
> nemo_init_IRQ(). The PIO helpers require the ISA space to be mapped
> and io_isa_base to be set since they take a PIO register address
> rather than an MMIO address. It looks like there's a few other legacy
> embedded platforms that might have the same problem.
>
> I guess the real fix would be to decouple the ISA base address
> discovery from the PHB discovery. That should be doable since it's all
> discovered via DT anyway and we only support one ISA address range,
> but it's a bit of work.
Sorry because of the false statement of the boot issue. It was too late 
yesterday. If I understand it correctly then the position of the PCIE 
devices scan is at a new place. Therefore it doesn't work anymore. It 
hasn't nothing to do with the device tree adoption. We will use the 
following patch for reverting this commit for further testing the new 
kernels.

--- a/arch/powerpc/platforms/pasemi/setup.c     2021-02-23 
21:40:04.835999708 +0100
+++ b/arch/powerpc/platforms/pasemi/setup.c     2021-02-23 
21:46:04.560667045 +0100
@@ -144,6 +144,7 @@ static void __init pas_setup_arch(void)
         /* Setup SMP callback */
         smp_ops = &pas_smp_ops;
  #endif
+       pas_pci_init();

         /* Remap SDC register for doing reset */
         /* XXXOJN This should maybe come out of the device tree */
@@ -444,7 +445,6 @@ define_machine(pasemi) {
         .name                   = "PA Semi PWRficient",
         .probe                  = pas_probe,
         .setup_arch             = pas_setup_arch,
-       .discover_phbs          = pas_pci_init,
         .init_IRQ               = pas_init_IRQ,
         .get_irq                = mpic_get_irq,
         .restart                = pas_restart,