From: Jerry Van Baren <vanbaren_gerald@si.com>
To: linuxppc-embedded@lists.linuxppc.org
Subject: Re: Linuxppc and MPC8255 routing performance
Date: Fri, 09 Nov 2001 13:08:14 -0500 [thread overview]
Message-ID: <5.1.0.14.2.20011109125808.0300b040@falcon.si.com> (raw)
In-Reply-To: <3BEC0578.9020704@embeddededge.com>
At 11:34 AM 11/9/01 -0500, Dan Malek wrote:
>Ricardo Scop wrote:
>
>
>>By "backside" memory you mean ... the internal data cache, perhaps?
>
>No, bad use of words on my part. The 8260 has a local bus that can only
>be accessed from the CPU core and CPM (it's not on the 60x bus). Maybe
>the 8255 doesn't have this feature, I don't remember.
>
>
> -- Dan
The 8255 uses the 8260 "local bus" connections for the PCI bus.
gvb
** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
next prev parent reply other threads:[~2001-11-09 18:08 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2001-11-07 20:30 Linuxppc and MPC8255 routing performance Ricardo Scop
2001-11-08 19:41 ` Dan Malek
2001-11-08 15:02 ` Ricardo Scop
2001-11-08 20:43 ` Val Henson
2001-11-08 21:45 ` Dan Malek
2001-11-09 9:55 ` Ricardo Scop
2001-11-09 16:34 ` Dan Malek
2001-11-09 18:08 ` Jerry Van Baren [this message]
[not found] <D73A25AA6E54D511AD74009027B1110F04F5E1@ORION>
2001-11-13 11:03 ` Ricardo Scop
2001-11-13 17:02 ` Dan Malek
2001-11-13 12:38 ` Ricardo Scop
2001-11-13 18:21 ` Dan Malek
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