From: Eugene Surovegin <ebs@ebshome.net>
To: Roland Dreier <roland@topspin.com>
Cc: Bret Indrelee <Bret.Indrelee@qlogic.com>,
Matt Porter <mporter@kernel.crashing.org>,
Linux PPC Embedded mailing list
<linuxppc-embedded@lists.linuxppc.org>
Subject: Re: Any restrictions on DMA address boundry?
Date: Thu, 25 Sep 2003 13:54:23 -0700 [thread overview]
Message-ID: <5.1.0.14.2.20030925134712.03b0ef78@mail.ebshome.net> (raw)
In-Reply-To: <52k77wk9mj.fsf@topspin.com>
At 11:26 AM 9/25/2003, Roland Dreier wrote:
>People often come up with complicated schemes like flushing and
>invalidating the cache before and after the DMA transfer, but there's
>always a scenario where the DMA buffer and/or the unrelated data get
>corrupted. The only solution is to make sure that you don't put
>unrelated data in the same cache line as a DMA buffer.
Well, I'm one of those strange people.
Actually, those schemes are quite trivial and they help in _real_ life.
I fully understand that they are not 100% foolproof, but I think they are
_better_ than doing _nothing_.
I already _wasted_ a lot of my time debugging cache coherency problems.
I cannot audit _all_ drivers/subsystems I use nor I can force their authors
do this.
Eugene.
** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
next prev parent reply other threads:[~2003-09-25 20:54 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-09-22 15:13 Any restrictions on DMA address boundry? Bret Indrelee
2003-09-22 16:59 ` Matt Porter
2003-09-25 17:56 ` Roland Dreier
2003-09-25 18:15 ` Bret Indrelee
2003-09-25 18:26 ` Roland Dreier
2003-09-25 20:54 ` Eugene Surovegin [this message]
2003-09-25 19:56 ` Matt Porter
2003-09-25 20:20 ` Bret Indrelee
2003-09-25 20:55 ` Matt Porter
2003-09-25 21:27 ` Bret Indrelee
2003-09-25 20:25 ` Eugene Surovegin
2003-09-25 20:32 ` Bret Indrelee
2003-09-25 20:57 ` Matt Porter
2003-09-25 20:41 ` Matt Porter
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