* [PATCH V5 0/3] PCI patch set description @ 2012-08-03 10:14 Jia Hongtao 2012-08-03 10:14 ` [PATCH V5 1/3] powerpc/fsl-pci: Only scan PCI bus if configured as a host Jia Hongtao ` (2 more replies) 0 siblings, 3 replies; 28+ messages in thread From: Jia Hongtao @ 2012-08-03 10:14 UTC (permalink / raw) To: linuxppc-dev, galak; +Cc: B07421, b38951 The first patch fixed a kernel panic when scanning PCI bus if it is working in agent mode. In later two patches we unified PCI initialization code by changing fsl_pci to a platform drvier. The approach will affect swiotlb init and this issue is addressed in the second patch. All boards are converted to use PCI controller platform driver. ^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH V5 1/3] powerpc/fsl-pci: Only scan PCI bus if configured as a host 2012-08-03 10:14 [PATCH V5 0/3] PCI patch set description Jia Hongtao @ 2012-08-03 10:14 ` Jia Hongtao 2012-08-03 13:57 ` Kumar Gala 2012-08-03 10:14 ` [PATCH V5 2/3] powerpc/swiotlb: Enable at early stage and disable if not necessary Jia Hongtao 2012-08-03 10:14 ` [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code Jia Hongtao 2 siblings, 1 reply; 28+ messages in thread From: Jia Hongtao @ 2012-08-03 10:14 UTC (permalink / raw) To: linuxppc-dev, galak; +Cc: B07421, b38951 We change fsl_add_bridge to return -ENODEV if the controller is working in agent mode. Then check the return value of fsl_add_bridge to guarantee that only successfully added host bus will be scanned. Signed-off-by: Jia Hongtao <B38951@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> --- arch/powerpc/sysdev/fsl_pci.c | 13 ++++++++----- 1 files changed, 8 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index 50a38b3..6938792 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c @@ -465,7 +465,7 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary) iounmap(hose->cfg_data); iounmap(hose->cfg_addr); pcibios_free_controller(hose); - return 0; + return -ENODEV; } setup_pci_cmd(hose); @@ -828,6 +828,7 @@ struct device_node *fsl_pci_primary; void __devinit fsl_pci_init(void) { + int ret; struct device_node *node; struct pci_controller *hose; dma_addr_t max = 0xffffffff; @@ -856,10 +857,12 @@ void __devinit fsl_pci_init(void) if (!fsl_pci_primary) fsl_pci_primary = node; - fsl_add_bridge(node, fsl_pci_primary == node); - hose = pci_find_hose_for_OF_device(node); - max = min(max, hose->dma_window_base_cur + - hose->dma_window_size); + ret = fsl_add_bridge(node, fsl_pci_primary == node); + if (ret == 0) { + hose = pci_find_hose_for_OF_device(node); + max = min(max, hose->dma_window_base_cur + + hose->dma_window_size); + } } } -- 1.7.5.1 ^ permalink raw reply related [flat|nested] 28+ messages in thread
* Re: [PATCH V5 1/3] powerpc/fsl-pci: Only scan PCI bus if configured as a host 2012-08-03 10:14 ` [PATCH V5 1/3] powerpc/fsl-pci: Only scan PCI bus if configured as a host Jia Hongtao @ 2012-08-03 13:57 ` Kumar Gala 0 siblings, 0 replies; 28+ messages in thread From: Kumar Gala @ 2012-08-03 13:57 UTC (permalink / raw) To: Jia Hongtao; +Cc: B07421, linuxppc-dev On Aug 3, 2012, at 5:14 AM, Jia Hongtao wrote: > We change fsl_add_bridge to return -ENODEV if the controller is working in > agent mode. Then check the return value of fsl_add_bridge to guarantee > that only successfully added host bus will be scanned. > > Signed-off-by: Jia Hongtao <B38951@freescale.com> > Signed-off-by: Li Yang <leoli@freescale.com> > --- > arch/powerpc/sysdev/fsl_pci.c | 13 ++++++++----- > 1 files changed, 8 insertions(+), 5 deletions(-) applied to merge - k ^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH V5 2/3] powerpc/swiotlb: Enable at early stage and disable if not necessary 2012-08-03 10:14 [PATCH V5 0/3] PCI patch set description Jia Hongtao 2012-08-03 10:14 ` [PATCH V5 1/3] powerpc/fsl-pci: Only scan PCI bus if configured as a host Jia Hongtao @ 2012-08-03 10:14 ` Jia Hongtao 2012-08-08 19:03 ` Kumar Gala 2012-08-10 12:58 ` Kumar Gala 2012-08-03 10:14 ` [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code Jia Hongtao 2 siblings, 2 replies; 28+ messages in thread From: Jia Hongtao @ 2012-08-03 10:14 UTC (permalink / raw) To: linuxppc-dev, galak; +Cc: B07421, b38951 Remove the dependency on PCI initialization for SWIOTLB initialization. So that PCI can be initialized at proper time. SWIOTLB is partly determined by PCI inbound/outbound map which is assigned in PCI initialization. But swiotlb_init() should be done at the stage of mem_init() which is much earlier than PCI initialization. So we reserve the memory for SWIOTLB first and free it if not necessary. All boards are converted to fit this change. Signed-off-by: Jia Hongtao <B38951@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> --- arch/powerpc/include/asm/swiotlb.h | 6 ++++++ arch/powerpc/kernel/dma-swiotlb.c | 20 ++++++++++++++++++++ arch/powerpc/mm/mem.c | 3 +-- arch/powerpc/platforms/44x/currituck.c | 10 ++-------- arch/powerpc/platforms/85xx/mpc85xx_ds.c | 1 + arch/powerpc/platforms/85xx/qemu_e500.c | 1 + arch/powerpc/sysdev/fsl_pci.c | 5 +---- 7 files changed, 32 insertions(+), 14 deletions(-) diff --git a/arch/powerpc/include/asm/swiotlb.h b/arch/powerpc/include/asm/swiotlb.h index 8979d4c..de99d6e 100644 --- a/arch/powerpc/include/asm/swiotlb.h +++ b/arch/powerpc/include/asm/swiotlb.h @@ -22,4 +22,10 @@ int __init swiotlb_setup_bus_notifier(void); extern void pci_dma_dev_setup_swiotlb(struct pci_dev *pdev); +#ifdef CONFIG_SWIOTLB +void swiotlb_detect_4g(void); +#else +static inline void swiotlb_detect_4g(void) {} +#endif + #endif /* __ASM_SWIOTLB_H */ diff --git a/arch/powerpc/kernel/dma-swiotlb.c b/arch/powerpc/kernel/dma-swiotlb.c index 4ab88da..aa85550 100644 --- a/arch/powerpc/kernel/dma-swiotlb.c +++ b/arch/powerpc/kernel/dma-swiotlb.c @@ -104,3 +104,23 @@ int __init swiotlb_setup_bus_notifier(void) &ppc_swiotlb_plat_bus_notifier); return 0; } + +void swiotlb_detect_4g(void) +{ + if ((memblock_end_of_DRAM() - 1) > 0xffffffff) + ppc_swiotlb_enable = 1; +} + +static int __init swiotlb_late_init(void) +{ + if (ppc_swiotlb_enable) { + swiotlb_print_info(); + set_pci_dma_ops(&swiotlb_dma_ops); + ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; + } else { + swiotlb_free(); + } + + return 0; +} +subsys_initcall(swiotlb_late_init); diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c index baaafde..f23c4e0 100644 --- a/arch/powerpc/mm/mem.c +++ b/arch/powerpc/mm/mem.c @@ -300,8 +300,7 @@ void __init mem_init(void) unsigned long reservedpages = 0, codesize, initsize, datasize, bsssize; #ifdef CONFIG_SWIOTLB - if (ppc_swiotlb_enable) - swiotlb_init(1); + swiotlb_init(0); #endif num_physpages = memblock_phys_mem_size() >> PAGE_SHIFT; diff --git a/arch/powerpc/platforms/44x/currituck.c b/arch/powerpc/platforms/44x/currituck.c index 9f6c33d..6bd89a0 100644 --- a/arch/powerpc/platforms/44x/currituck.c +++ b/arch/powerpc/platforms/44x/currituck.c @@ -21,7 +21,6 @@ */ #include <linux/init.h> -#include <linux/memblock.h> #include <linux/of.h> #include <linux/of_platform.h> #include <linux/rtc.h> @@ -159,13 +158,8 @@ static void __init ppc47x_setup_arch(void) /* No need to check the DMA config as we /know/ our windows are all of * RAM. Lets hope that doesn't change */ -#ifdef CONFIG_SWIOTLB - if ((memblock_end_of_DRAM() - 1) > 0xffffffff) { - ppc_swiotlb_enable = 1; - set_pci_dma_ops(&swiotlb_dma_ops); - ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; - } -#endif + swiotlb_detect_4g(); + ppc47x_smp_init(); } diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c index 6d3265f..56f8c8f 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c @@ -159,6 +159,7 @@ static void __init mpc85xx_ds_setup_arch(void) if (ppc_md.progress) ppc_md.progress("mpc85xx_ds_setup_arch()", 0); + swiotlb_detect_4g(); mpc85xx_ds_pci_init(); mpc85xx_smp_init(); diff --git a/arch/powerpc/platforms/85xx/qemu_e500.c b/arch/powerpc/platforms/85xx/qemu_e500.c index 95a2e53..3c5490c 100644 --- a/arch/powerpc/platforms/85xx/qemu_e500.c +++ b/arch/powerpc/platforms/85xx/qemu_e500.c @@ -42,6 +42,7 @@ static void __init qemu_e500_setup_arch(void) ppc_md.progress("qemu_e500_setup_arch()", 0); fsl_pci_init(); + swiotlb_detect_4g(); mpc85xx_smp_init(); } diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index 6938792..da7a3d7 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c @@ -872,11 +872,8 @@ void __devinit fsl_pci_init(void) * we need SWIOTLB to handle buffers located outside of * dma capable memory region */ - if (memblock_end_of_DRAM() - 1 > max) { + if (memblock_end_of_DRAM() - 1 > max) ppc_swiotlb_enable = 1; - set_pci_dma_ops(&swiotlb_dma_ops); - ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; - } #endif } #endif -- 1.7.5.1 ^ permalink raw reply related [flat|nested] 28+ messages in thread
* Re: [PATCH V5 2/3] powerpc/swiotlb: Enable at early stage and disable if not necessary 2012-08-03 10:14 ` [PATCH V5 2/3] powerpc/swiotlb: Enable at early stage and disable if not necessary Jia Hongtao @ 2012-08-08 19:03 ` Kumar Gala 2012-08-09 5:57 ` Tony Breeds 2012-08-10 12:58 ` Kumar Gala 1 sibling, 1 reply; 28+ messages in thread From: Kumar Gala @ 2012-08-08 19:03 UTC (permalink / raw) To: Josh Boyer, Tony Breeds Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org list, Jia Hongtao On Aug 3, 2012, at 5:14 AM, Jia Hongtao wrote: > Remove the dependency on PCI initialization for SWIOTLB = initialization. > So that PCI can be initialized at proper time. >=20 > SWIOTLB is partly determined by PCI inbound/outbound map which is = assigned > in PCI initialization. But swiotlb_init() should be done at the stage = of > mem_init() which is much earlier than PCI initialization. So we = reserve the > memory for SWIOTLB first and free it if not necessary. >=20 > All boards are converted to fit this change. >=20 > Signed-off-by: Jia Hongtao <B38951@freescale.com> > Signed-off-by: Li Yang <leoli@freescale.com> > --- > arch/powerpc/include/asm/swiotlb.h | 6 ++++++ > arch/powerpc/kernel/dma-swiotlb.c | 20 ++++++++++++++++++++ > arch/powerpc/mm/mem.c | 3 +-- > arch/powerpc/platforms/44x/currituck.c | 10 ++-------- > arch/powerpc/platforms/85xx/mpc85xx_ds.c | 1 + > arch/powerpc/platforms/85xx/qemu_e500.c | 1 + > arch/powerpc/sysdev/fsl_pci.c | 5 +---- > 7 files changed, 32 insertions(+), 14 deletions(-) Josh, Tony Can you ack the 44x/currituck.c change. thanks - k >=20 > diff --git a/arch/powerpc/include/asm/swiotlb.h = b/arch/powerpc/include/asm/swiotlb.h > index 8979d4c..de99d6e 100644 > --- a/arch/powerpc/include/asm/swiotlb.h > +++ b/arch/powerpc/include/asm/swiotlb.h > @@ -22,4 +22,10 @@ int __init swiotlb_setup_bus_notifier(void); >=20 > extern void pci_dma_dev_setup_swiotlb(struct pci_dev *pdev); >=20 > +#ifdef CONFIG_SWIOTLB > +void swiotlb_detect_4g(void); > +#else > +static inline void swiotlb_detect_4g(void) {} > +#endif > + > #endif /* __ASM_SWIOTLB_H */ > diff --git a/arch/powerpc/kernel/dma-swiotlb.c = b/arch/powerpc/kernel/dma-swiotlb.c > index 4ab88da..aa85550 100644 > --- a/arch/powerpc/kernel/dma-swiotlb.c > +++ b/arch/powerpc/kernel/dma-swiotlb.c > @@ -104,3 +104,23 @@ int __init swiotlb_setup_bus_notifier(void) > &ppc_swiotlb_plat_bus_notifier); > return 0; > } > + > +void swiotlb_detect_4g(void) > +{ > + if ((memblock_end_of_DRAM() - 1) > 0xffffffff) > + ppc_swiotlb_enable =3D 1; > +} > + > +static int __init swiotlb_late_init(void) > +{ > + if (ppc_swiotlb_enable) { > + swiotlb_print_info(); > + set_pci_dma_ops(&swiotlb_dma_ops); > + ppc_md.pci_dma_dev_setup =3D pci_dma_dev_setup_swiotlb; > + } else { > + swiotlb_free(); > + } > + > + return 0; > +} > +subsys_initcall(swiotlb_late_init); > diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c > index baaafde..f23c4e0 100644 > --- a/arch/powerpc/mm/mem.c > +++ b/arch/powerpc/mm/mem.c > @@ -300,8 +300,7 @@ void __init mem_init(void) > unsigned long reservedpages =3D 0, codesize, initsize, datasize, = bsssize; >=20 > #ifdef CONFIG_SWIOTLB > - if (ppc_swiotlb_enable) > - swiotlb_init(1); > + swiotlb_init(0); > #endif >=20 > num_physpages =3D memblock_phys_mem_size() >> PAGE_SHIFT; > diff --git a/arch/powerpc/platforms/44x/currituck.c = b/arch/powerpc/platforms/44x/currituck.c > index 9f6c33d..6bd89a0 100644 > --- a/arch/powerpc/platforms/44x/currituck.c > +++ b/arch/powerpc/platforms/44x/currituck.c > @@ -21,7 +21,6 @@ > */ >=20 > #include <linux/init.h> > -#include <linux/memblock.h> > #include <linux/of.h> > #include <linux/of_platform.h> > #include <linux/rtc.h> > @@ -159,13 +158,8 @@ static void __init ppc47x_setup_arch(void) >=20 > /* No need to check the DMA config as we /know/ our windows are = all of > * RAM. Lets hope that doesn't change */ > -#ifdef CONFIG_SWIOTLB > - if ((memblock_end_of_DRAM() - 1) > 0xffffffff) { > - ppc_swiotlb_enable =3D 1; > - set_pci_dma_ops(&swiotlb_dma_ops); > - ppc_md.pci_dma_dev_setup =3D pci_dma_dev_setup_swiotlb; > - } > -#endif > + swiotlb_detect_4g(); > + > ppc47x_smp_init(); > } >=20 > diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c = b/arch/powerpc/platforms/85xx/mpc85xx_ds.c > index 6d3265f..56f8c8f 100644 > --- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c > +++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c > @@ -159,6 +159,7 @@ static void __init mpc85xx_ds_setup_arch(void) > if (ppc_md.progress) > ppc_md.progress("mpc85xx_ds_setup_arch()", 0); >=20 > + swiotlb_detect_4g(); > mpc85xx_ds_pci_init(); > mpc85xx_smp_init(); >=20 > diff --git a/arch/powerpc/platforms/85xx/qemu_e500.c = b/arch/powerpc/platforms/85xx/qemu_e500.c > index 95a2e53..3c5490c 100644 > --- a/arch/powerpc/platforms/85xx/qemu_e500.c > +++ b/arch/powerpc/platforms/85xx/qemu_e500.c > @@ -42,6 +42,7 @@ static void __init qemu_e500_setup_arch(void) > ppc_md.progress("qemu_e500_setup_arch()", 0); >=20 > fsl_pci_init(); > + swiotlb_detect_4g(); > mpc85xx_smp_init(); > } >=20 > diff --git a/arch/powerpc/sysdev/fsl_pci.c = b/arch/powerpc/sysdev/fsl_pci.c > index 6938792..da7a3d7 100644 > --- a/arch/powerpc/sysdev/fsl_pci.c > +++ b/arch/powerpc/sysdev/fsl_pci.c > @@ -872,11 +872,8 @@ void __devinit fsl_pci_init(void) > * we need SWIOTLB to handle buffers located outside of > * dma capable memory region > */ > - if (memblock_end_of_DRAM() - 1 > max) { > + if (memblock_end_of_DRAM() - 1 > max) > ppc_swiotlb_enable =3D 1; > - set_pci_dma_ops(&swiotlb_dma_ops); > - ppc_md.pci_dma_dev_setup =3D pci_dma_dev_setup_swiotlb; > - } > #endif > } > #endif > --=20 > 1.7.5.1 >=20 ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH V5 2/3] powerpc/swiotlb: Enable at early stage and disable if not necessary 2012-08-08 19:03 ` Kumar Gala @ 2012-08-09 5:57 ` Tony Breeds 0 siblings, 0 replies; 28+ messages in thread From: Tony Breeds @ 2012-08-09 5:57 UTC (permalink / raw) To: Kumar Gala Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org list, Jia Hongtao [-- Attachment #1: Type: text/plain, Size: 1360 bytes --] On Wed, Aug 08, 2012 at 02:03:45PM -0500, Kumar Gala wrote: > > On Aug 3, 2012, at 5:14 AM, Jia Hongtao wrote: > > > Remove the dependency on PCI initialization for SWIOTLB initialization. > > So that PCI can be initialized at proper time. > > > > SWIOTLB is partly determined by PCI inbound/outbound map which is assigned > > in PCI initialization. But swiotlb_init() should be done at the stage of > > mem_init() which is much earlier than PCI initialization. So we reserve the > > memory for SWIOTLB first and free it if not necessary. > > > > All boards are converted to fit this change. > > > > Signed-off-by: Jia Hongtao <B38951@freescale.com> > > Signed-off-by: Li Yang <leoli@freescale.com> > > --- > > arch/powerpc/include/asm/swiotlb.h | 6 ++++++ > > arch/powerpc/kernel/dma-swiotlb.c | 20 ++++++++++++++++++++ > > arch/powerpc/mm/mem.c | 3 +-- > > arch/powerpc/platforms/44x/currituck.c | 10 ++-------- > > arch/powerpc/platforms/85xx/mpc85xx_ds.c | 1 + > > arch/powerpc/platforms/85xx/qemu_e500.c | 1 + > > arch/powerpc/sysdev/fsl_pci.c | 5 +---- > > 7 files changed, 32 insertions(+), 14 deletions(-) > > Josh, Tony > > Can you ack the 44x/currituck.c change. Looks fine to me. Acked-by: Tony Breeds <tony@bakeyournoodle.com> Yours Tony [-- Attachment #2: Type: application/pgp-signature, Size: 836 bytes --] ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH V5 2/3] powerpc/swiotlb: Enable at early stage and disable if not necessary 2012-08-03 10:14 ` [PATCH V5 2/3] powerpc/swiotlb: Enable at early stage and disable if not necessary Jia Hongtao 2012-08-08 19:03 ` Kumar Gala @ 2012-08-10 12:58 ` Kumar Gala 1 sibling, 0 replies; 28+ messages in thread From: Kumar Gala @ 2012-08-10 12:58 UTC (permalink / raw) To: Jia Hongtao; +Cc: B07421, linuxppc-dev On Aug 3, 2012, at 5:14 AM, Jia Hongtao wrote: > Remove the dependency on PCI initialization for SWIOTLB initialization. > So that PCI can be initialized at proper time. > > SWIOTLB is partly determined by PCI inbound/outbound map which is assigned > in PCI initialization. But swiotlb_init() should be done at the stage of > mem_init() which is much earlier than PCI initialization. So we reserve the > memory for SWIOTLB first and free it if not necessary. > > All boards are converted to fit this change. > > Signed-off-by: Jia Hongtao <B38951@freescale.com> > Signed-off-by: Li Yang <leoli@freescale.com> > --- > arch/powerpc/include/asm/swiotlb.h | 6 ++++++ > arch/powerpc/kernel/dma-swiotlb.c | 20 ++++++++++++++++++++ > arch/powerpc/mm/mem.c | 3 +-- > arch/powerpc/platforms/44x/currituck.c | 10 ++-------- > arch/powerpc/platforms/85xx/mpc85xx_ds.c | 1 + > arch/powerpc/platforms/85xx/qemu_e500.c | 1 + > arch/powerpc/sysdev/fsl_pci.c | 5 +---- > 7 files changed, 32 insertions(+), 14 deletions(-) applied to next - k ^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code 2012-08-03 10:14 [PATCH V5 0/3] PCI patch set description Jia Hongtao 2012-08-03 10:14 ` [PATCH V5 1/3] powerpc/fsl-pci: Only scan PCI bus if configured as a host Jia Hongtao 2012-08-03 10:14 ` [PATCH V5 2/3] powerpc/swiotlb: Enable at early stage and disable if not necessary Jia Hongtao @ 2012-08-03 10:14 ` Jia Hongtao 2012-08-03 16:27 ` Scott Wood 2 siblings, 1 reply; 28+ messages in thread From: Jia Hongtao @ 2012-08-03 10:14 UTC (permalink / raw) To: linuxppc-dev, galak; +Cc: B07421, b38951 We unified the Freescale pci/pcie initialization by changing the fsl_pci to a platform driver. In previous PCI code architecture the initialization routine is called at board_setup_arch stage. Now the initialization is done in probe function which is architectural better. Also It's convenient for adding PM support for PCI controller in later patch. Now we registered pci controllers as platform devices. So we combine two initialization code as one platform driver. Signed-off-by: Jia Hongtao <B38951@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> --- Changed for V5: Convert all boards to use PCI controller platform driver. arch/powerpc/platforms/85xx/common.c | 10 +++ arch/powerpc/platforms/85xx/corenet_ds.c | 31 +-------- arch/powerpc/platforms/85xx/ge_imp3a.c | 48 +------------ arch/powerpc/platforms/85xx/mpc8536_ds.c | 36 +--------- arch/powerpc/platforms/85xx/mpc85xx_ads.c | 9 +-- arch/powerpc/platforms/85xx/mpc85xx_cds.c | 14 +---- arch/powerpc/platforms/85xx/mpc85xx_ds.c | 38 ++-------- arch/powerpc/platforms/85xx/mpc85xx_mds.c | 38 +--------- arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 28 +++----- arch/powerpc/platforms/85xx/p1010rdb.c | 14 +---- arch/powerpc/platforms/85xx/p1022_ds.c | 34 +--------- arch/powerpc/platforms/85xx/p1022_rdk.c | 34 +--------- arch/powerpc/platforms/85xx/p1023_rds.c | 7 +-- arch/powerpc/platforms/85xx/p2041_rdb.c | 2 +- arch/powerpc/platforms/85xx/p3041_ds.c | 2 +- arch/powerpc/platforms/85xx/p4080_ds.c | 2 +- arch/powerpc/platforms/85xx/p5020_ds.c | 2 +- arch/powerpc/platforms/85xx/p5040_ds.c | 2 +- arch/powerpc/platforms/85xx/qemu_e500.c | 3 +- arch/powerpc/platforms/85xx/sbc8548.c | 19 +----- arch/powerpc/platforms/85xx/socrates.c | 11 +--- arch/powerpc/platforms/85xx/stx_gp3.c | 11 +--- arch/powerpc/platforms/85xx/tqm85xx.c | 21 +------ arch/powerpc/platforms/85xx/xes_mpc85xx.c | 54 ++------------- arch/powerpc/platforms/86xx/gef_ppc9a.c | 10 +-- arch/powerpc/platforms/86xx/gef_sbc310.c | 11 +--- arch/powerpc/platforms/86xx/gef_sbc610.c | 10 +-- arch/powerpc/platforms/86xx/mpc8610_hpcd.c | 19 +---- arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 40 +---------- arch/powerpc/platforms/86xx/sbc8641d.c | 12 +--- arch/powerpc/sysdev/fsl_pci.c | 102 +++++++++++++++++----------- arch/powerpc/sysdev/fsl_pci.h | 9 ++- drivers/edac/mpc85xx_edac.c | 43 +++--------- 33 files changed, 160 insertions(+), 566 deletions(-) diff --git a/arch/powerpc/platforms/85xx/common.c b/arch/powerpc/platforms/85xx/common.c index 67dac22..d0861a0 100644 --- a/arch/powerpc/platforms/85xx/common.c +++ b/arch/powerpc/platforms/85xx/common.c @@ -27,6 +27,16 @@ static struct of_device_id __initdata mpc85xx_common_ids[] = { { .compatible = "fsl,mpc8548-guts", }, /* Probably unnecessary? */ { .compatible = "gpio-leds", }, + /* For all PCI controllers */ + { .compatible = "fsl,mpc8540-pci", }, + { .compatible = "fsl,mpc8548-pcie", }, + { .compatible = "fsl,p1022-pcie", }, + { .compatible = "fsl,p1010-pcie", }, + { .compatible = "fsl,p1023-pcie", }, + { .compatible = "fsl,p4080-pcie", }, + { .compatible = "fsl,qoriq-pcie-v2.4", }, + { .compatible = "fsl,qoriq-pcie-v2.3", }, + { .compatible = "fsl,qoriq-pcie-v2.2", }, {}, }; diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c b/arch/powerpc/platforms/85xx/corenet_ds.c index 473d573..84b9d86 100644 --- a/arch/powerpc/platforms/85xx/corenet_ds.c +++ b/arch/powerpc/platforms/85xx/corenet_ds.c @@ -16,7 +16,6 @@ #include <linux/kdev_t.h> #include <linux/delay.h> #include <linux/interrupt.h> -#include <linux/memblock.h> #include <asm/time.h> #include <asm/machdep.h> @@ -52,39 +51,13 @@ void __init corenet_ds_pic_init(void) */ void __init corenet_ds_setup_arch(void) { -#ifdef CONFIG_PCI - struct device_node *np; - struct pci_controller *hose; -#endif - dma_addr_t max = 0xffffffff; - mpc85xx_smp_init(); -#ifdef CONFIG_PCI - for_each_node_by_type(np, "pci") { - if (of_device_is_compatible(np, "fsl,p4080-pcie") || - of_device_is_compatible(np, "fsl,qoriq-pcie-v2.2") || - of_device_is_compatible(np, "fsl,qoriq-pcie-v2.3") || - of_device_is_compatible(np, "fsl,qoriq-pcie-v2.4")) { - fsl_add_bridge(np, 0); - hose = pci_find_hose_for_OF_device(np); - max = min(max, hose->dma_window_base_cur + - hose->dma_window_size); - } - } - -#ifdef CONFIG_PPC64 +#if defined(CONFIG_PCI) && defined(CONFIG_PPC64) pci_devs_phb_init(); #endif -#endif -#ifdef CONFIG_SWIOTLB - if ((memblock_end_of_DRAM() - 1) > max) { - ppc_swiotlb_enable = 1; - set_pci_dma_ops(&swiotlb_dma_ops); - ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; - } -#endif + swiotlb_detect_4g(); pr_info("%s board from Freescale Semiconductor\n", ppc_md.name); } diff --git a/arch/powerpc/platforms/85xx/ge_imp3a.c b/arch/powerpc/platforms/85xx/ge_imp3a.c index b6a728b..0483337 100644 --- a/arch/powerpc/platforms/85xx/ge_imp3a.c +++ b/arch/powerpc/platforms/85xx/ge_imp3a.c @@ -22,7 +22,6 @@ #include <linux/seq_file.h> #include <linux/interrupt.h> #include <linux/of_platform.h> -#include <linux/memblock.h> #include <asm/time.h> #include <asm/machdep.h> @@ -84,53 +83,19 @@ void __init ge_imp3a_pic_init(void) of_node_put(cascade_node); } -#ifdef CONFIG_PCI -static int primary_phb_addr; -#endif /* CONFIG_PCI */ - /* * Setup the architecture */ static void __init ge_imp3a_setup_arch(void) { struct device_node *regs; -#ifdef CONFIG_PCI - struct device_node *np; - struct pci_controller *hose; -#endif - dma_addr_t max = 0xffffffff; if (ppc_md.progress) ppc_md.progress("ge_imp3a_setup_arch()", 0); -#ifdef CONFIG_PCI - for_each_node_by_type(np, "pci") { - if (of_device_is_compatible(np, "fsl,mpc8540-pci") || - of_device_is_compatible(np, "fsl,mpc8548-pcie") || - of_device_is_compatible(np, "fsl,p2020-pcie")) { - struct resource rsrc; - of_address_to_resource(np, 0, &rsrc); - if ((rsrc.start & 0xfffff) == primary_phb_addr) - fsl_add_bridge(np, 1); - else - fsl_add_bridge(np, 0); - - hose = pci_find_hose_for_OF_device(np); - max = min(max, hose->dma_window_base_cur + - hose->dma_window_size); - } - } -#endif - mpc85xx_smp_init(); -#ifdef CONFIG_SWIOTLB - if ((memblock_end_of_DRAM() - 1) > max) { - ppc_swiotlb_enable = 1; - set_pci_dma_ops(&swiotlb_dma_ops); - ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; - } -#endif + swiotlb_detect_4g(); /* Remap basic board registers */ regs = of_find_compatible_node(NULL, NULL, "ge,imp3a-fpga-regs"); @@ -215,17 +180,10 @@ static int __init ge_imp3a_probe(void) { unsigned long root = of_get_flat_dt_root(); - if (of_flat_dt_is_compatible(root, "ge,IMP3A")) { -#ifdef CONFIG_PCI - primary_phb_addr = 0x9000; -#endif - return 1; - } - - return 0; + return of_flat_dt_is_compatible(root, "ge,IMP3A"); } -machine_device_initcall(ge_imp3a, mpc85xx_common_publish_devices); +machine_arch_initcall(ge_imp3a, mpc85xx_common_publish_devices); machine_arch_initcall(ge_imp3a, swiotlb_setup_bus_notifier); diff --git a/arch/powerpc/platforms/85xx/mpc8536_ds.c b/arch/powerpc/platforms/85xx/mpc8536_ds.c index 767c7cf..9bac2c2 100644 --- a/arch/powerpc/platforms/85xx/mpc8536_ds.c +++ b/arch/powerpc/platforms/85xx/mpc8536_ds.c @@ -17,7 +17,6 @@ #include <linux/seq_file.h> #include <linux/interrupt.h> #include <linux/of_platform.h> -#include <linux/memblock.h> #include <asm/time.h> #include <asm/machdep.h> @@ -46,46 +45,15 @@ void __init mpc8536_ds_pic_init(void) */ static void __init mpc8536_ds_setup_arch(void) { -#ifdef CONFIG_PCI - struct device_node *np; - struct pci_controller *hose; -#endif - dma_addr_t max = 0xffffffff; - if (ppc_md.progress) ppc_md.progress("mpc8536_ds_setup_arch()", 0); -#ifdef CONFIG_PCI - for_each_node_by_type(np, "pci") { - if (of_device_is_compatible(np, "fsl,mpc8540-pci") || - of_device_is_compatible(np, "fsl,mpc8548-pcie")) { - struct resource rsrc; - of_address_to_resource(np, 0, &rsrc); - if ((rsrc.start & 0xfffff) == 0x8000) - fsl_add_bridge(np, 1); - else - fsl_add_bridge(np, 0); - - hose = pci_find_hose_for_OF_device(np); - max = min(max, hose->dma_window_base_cur + - hose->dma_window_size); - } - } - -#endif - -#ifdef CONFIG_SWIOTLB - if ((memblock_end_of_DRAM() - 1) > max) { - ppc_swiotlb_enable = 1; - set_pci_dma_ops(&swiotlb_dma_ops); - ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; - } -#endif + swiotlb_detect_4g(); printk("MPC8536 DS board from Freescale Semiconductor\n"); } -machine_device_initcall(mpc8536_ds, mpc85xx_common_publish_devices); +machine_arch_initcall(mpc8536_ds, mpc85xx_common_publish_devices); machine_arch_initcall(mpc8536_ds, swiotlb_setup_bus_notifier); diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c index 29ee8fc..ae3ab48 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c @@ -137,10 +137,6 @@ static void __init init_ioports(void) static void __init mpc85xx_ads_setup_arch(void) { -#ifdef CONFIG_PCI - struct device_node *np; -#endif - if (ppc_md.progress) ppc_md.progress("mpc85xx_ads_setup_arch()", 0); @@ -150,9 +146,6 @@ static void __init mpc85xx_ads_setup_arch(void) #endif #ifdef CONFIG_PCI - for_each_compatible_node(np, "pci", "fsl,mpc8540-pci") - fsl_add_bridge(np, 1); - ppc_md.pci_exclude_device = mpc85xx_exclude_device; #endif } @@ -173,7 +166,7 @@ static void mpc85xx_ads_show_cpuinfo(struct seq_file *m) seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f)); } -machine_device_initcall(mpc85xx_ads, mpc85xx_common_publish_devices); +machine_arch_initcall(mpc85xx_ads, mpc85xx_common_publish_devices); /* * Called very early, device-tree isn't unflattened diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c index 11156fb..7b77b7cb 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c @@ -309,18 +309,6 @@ static void __init mpc85xx_cds_setup_arch(void) } #ifdef CONFIG_PCI - for_each_node_by_type(np, "pci") { - if (of_device_is_compatible(np, "fsl,mpc8540-pci") || - of_device_is_compatible(np, "fsl,mpc8548-pcie")) { - struct resource rsrc; - of_address_to_resource(np, 0, &rsrc); - if ((rsrc.start & 0xfffff) == 0x8000) - fsl_add_bridge(np, 1); - else - fsl_add_bridge(np, 0); - } - } - ppc_md.pci_irq_fixup = mpc85xx_cds_pci_irq_fixup; ppc_md.pci_exclude_device = mpc85xx_exclude_device; #endif @@ -355,7 +343,7 @@ static int __init mpc85xx_cds_probe(void) return of_flat_dt_is_compatible(root, "MPC85xxCDS"); } -machine_device_initcall(mpc85xx_cds, mpc85xx_common_publish_devices); +machine_arch_initcall(mpc85xx_cds, mpc85xx_common_publish_devices); define_machine(mpc85xx_cds) { .name = "MPC85xx CDS", diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c index 56f8c8f..f378253 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c @@ -20,7 +20,6 @@ #include <linux/seq_file.h> #include <linux/interrupt.h> #include <linux/of_platform.h> -#include <linux/memblock.h> #include <asm/time.h> #include <asm/machdep.h> @@ -117,40 +116,16 @@ void __init mpc85xx_ds_pic_init(void) extern int uli_exclude_device(struct pci_controller *hose, u_char bus, u_char devfn); -static struct device_node *pci_with_uli; - static int mpc85xx_exclude_device(struct pci_controller *hose, u_char bus, u_char devfn) { - if (hose->dn == pci_with_uli) + if (hose->dn == fsl_pci_primary) return uli_exclude_device(hose, bus, devfn); return PCIBIOS_SUCCESSFUL; } #endif /* CONFIG_PCI */ -static void __init mpc85xx_ds_pci_init(void) -{ -#ifdef CONFIG_PCI - struct device_node *node; - - fsl_pci_init(); - - /* See if we have a ULI under the primary */ - - node = of_find_node_by_name(NULL, "uli1575"); - while ((pci_with_uli = of_get_parent(node))) { - of_node_put(node); - node = pci_with_uli; - - if (pci_with_uli == fsl_pci_primary) { - ppc_md.pci_exclude_device = mpc85xx_exclude_device; - break; - } - } -#endif -} - /* * Setup the architecture */ @@ -159,8 +134,11 @@ static void __init mpc85xx_ds_setup_arch(void) if (ppc_md.progress) ppc_md.progress("mpc85xx_ds_setup_arch()", 0); +#ifdef CONFIG_PCI + ppc_md.pci_exclude_device = mpc85xx_exclude_device; +#endif + swiotlb_detect_4g(); - mpc85xx_ds_pci_init(); mpc85xx_smp_init(); printk("MPC85xx DS board from Freescale Semiconductor\n"); @@ -176,9 +154,9 @@ static int __init mpc8544_ds_probe(void) return !!of_flat_dt_is_compatible(root, "MPC8544DS"); } -machine_device_initcall(mpc8544_ds, mpc85xx_common_publish_devices); -machine_device_initcall(mpc8572_ds, mpc85xx_common_publish_devices); -machine_device_initcall(p2020_ds, mpc85xx_common_publish_devices); +machine_arch_initcall(mpc8544_ds, mpc85xx_common_publish_devices); +machine_arch_initcall(mpc8572_ds, mpc85xx_common_publish_devices); +machine_arch_initcall(p2020_ds, mpc85xx_common_publish_devices); machine_arch_initcall(mpc8544_ds, swiotlb_setup_bus_notifier); machine_arch_initcall(mpc8572_ds, swiotlb_setup_bus_notifier); diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c index 8e4b094..555b106 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c @@ -327,44 +327,14 @@ static void __init mpc85xx_mds_qeic_init(void) { } static void __init mpc85xx_mds_setup_arch(void) { -#ifdef CONFIG_PCI - struct pci_controller *hose; - struct device_node *np; -#endif - dma_addr_t max = 0xffffffff; - if (ppc_md.progress) ppc_md.progress("mpc85xx_mds_setup_arch()", 0); -#ifdef CONFIG_PCI - for_each_node_by_type(np, "pci") { - if (of_device_is_compatible(np, "fsl,mpc8540-pci") || - of_device_is_compatible(np, "fsl,mpc8548-pcie")) { - struct resource rsrc; - of_address_to_resource(np, 0, &rsrc); - if ((rsrc.start & 0xfffff) == 0x8000) - fsl_add_bridge(np, 1); - else - fsl_add_bridge(np, 0); - - hose = pci_find_hose_for_OF_device(np); - max = min(max, hose->dma_window_base_cur + - hose->dma_window_size); - } - } -#endif - mpc85xx_smp_init(); mpc85xx_mds_qe_init(); -#ifdef CONFIG_SWIOTLB - if ((memblock_end_of_DRAM() - 1) > max) { - ppc_swiotlb_enable = 1; - set_pci_dma_ops(&swiotlb_dma_ops); - ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; - } -#endif + swiotlb_detect_4g(); } @@ -409,9 +379,9 @@ static int __init mpc85xx_publish_devices(void) return mpc85xx_common_publish_devices(); } -machine_device_initcall(mpc8568_mds, mpc85xx_publish_devices); -machine_device_initcall(mpc8569_mds, mpc85xx_publish_devices); -machine_device_initcall(p1021_mds, mpc85xx_common_publish_devices); +machine_arch_initcall(mpc8568_mds, mpc85xx_publish_devices); +machine_arch_initcall(mpc8569_mds, mpc85xx_publish_devices); +machine_arch_initcall(p1021_mds, mpc85xx_common_publish_devices); machine_arch_initcall(mpc8568_mds, swiotlb_setup_bus_notifier); machine_arch_initcall(mpc8569_mds, swiotlb_setup_bus_notifier); diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c index 1910fdc..f4a0b7a 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c @@ -86,21 +86,13 @@ void __init mpc85xx_rdb_pic_init(void) */ static void __init mpc85xx_rdb_setup_arch(void) { -#if defined(CONFIG_PCI) || defined(CONFIG_QUICC_ENGINE) +#ifdef CONFIG_QUICC_ENGINE struct device_node *np; #endif if (ppc_md.progress) ppc_md.progress("mpc85xx_rdb_setup_arch()", 0); -#ifdef CONFIG_PCI - for_each_node_by_type(np, "pci") { - if (of_device_is_compatible(np, "fsl,mpc8548-pcie")) - fsl_add_bridge(np, 0); - } - -#endif - mpc85xx_smp_init(); #ifdef CONFIG_QUICC_ENGINE @@ -161,15 +153,15 @@ qe_fail: printk(KERN_INFO "MPC85xx RDB board from Freescale Semiconductor\n"); } -machine_device_initcall(p2020_rdb, mpc85xx_common_publish_devices); -machine_device_initcall(p2020_rdb_pc, mpc85xx_common_publish_devices); -machine_device_initcall(p1020_mbg_pc, mpc85xx_common_publish_devices); -machine_device_initcall(p1020_rdb, mpc85xx_common_publish_devices); -machine_device_initcall(p1020_rdb_pc, mpc85xx_common_publish_devices); -machine_device_initcall(p1020_utm_pc, mpc85xx_common_publish_devices); -machine_device_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices); -machine_device_initcall(p1025_rdb, mpc85xx_common_publish_devices); -machine_device_initcall(p1024_rdb, mpc85xx_common_publish_devices); +machine_arch_initcall(p2020_rdb, mpc85xx_common_publish_devices); +machine_arch_initcall(p2020_rdb_pc, mpc85xx_common_publish_devices); +machine_arch_initcall(p1020_mbg_pc, mpc85xx_common_publish_devices); +machine_arch_initcall(p1020_rdb, mpc85xx_common_publish_devices); +machine_arch_initcall(p1020_rdb_pc, mpc85xx_common_publish_devices); +machine_arch_initcall(p1020_utm_pc, mpc85xx_common_publish_devices); +machine_arch_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices); +machine_arch_initcall(p1025_rdb, mpc85xx_common_publish_devices); +machine_arch_initcall(p1024_rdb, mpc85xx_common_publish_devices); /* * Called very early, device-tree isn't unflattened diff --git a/arch/powerpc/platforms/85xx/p1010rdb.c b/arch/powerpc/platforms/85xx/p1010rdb.c index dbaf443..a893bf1 100644 --- a/arch/powerpc/platforms/85xx/p1010rdb.c +++ b/arch/powerpc/platforms/85xx/p1010rdb.c @@ -46,25 +46,13 @@ void __init p1010_rdb_pic_init(void) */ static void __init p1010_rdb_setup_arch(void) { -#ifdef CONFIG_PCI - struct device_node *np; -#endif - if (ppc_md.progress) ppc_md.progress("p1010_rdb_setup_arch()", 0); -#ifdef CONFIG_PCI - for_each_node_by_type(np, "pci") { - if (of_device_is_compatible(np, "fsl,p1010-pcie")) - fsl_add_bridge(np, 0); - } - -#endif - printk(KERN_INFO "P1010 RDB board from Freescale Semiconductor\n"); } -machine_device_initcall(p1010_rdb, mpc85xx_common_publish_devices); +machine_arch_initcall(p1010_rdb, mpc85xx_common_publish_devices); machine_arch_initcall(p1010_rdb, swiotlb_setup_bus_notifier); /* diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c b/arch/powerpc/platforms/85xx/p1022_ds.c index 3c732ac..a32efb9 100644 --- a/arch/powerpc/platforms/85xx/p1022_ds.c +++ b/arch/powerpc/platforms/85xx/p1022_ds.c @@ -18,7 +18,6 @@ #include <linux/pci.h> #include <linux/of_platform.h> -#include <linux/memblock.h> #include <asm/div64.h> #include <asm/mpic.h> #include <asm/swiotlb.h> @@ -507,32 +506,9 @@ early_param("video", early_video_setup); */ static void __init p1022_ds_setup_arch(void) { -#ifdef CONFIG_PCI - struct device_node *np; -#endif - dma_addr_t max = 0xffffffff; - if (ppc_md.progress) ppc_md.progress("p1022_ds_setup_arch()", 0); -#ifdef CONFIG_PCI - for_each_compatible_node(np, "pci", "fsl,p1022-pcie") { - struct resource rsrc; - struct pci_controller *hose; - - of_address_to_resource(np, 0, &rsrc); - - if ((rsrc.start & 0xfffff) == 0x8000) - fsl_add_bridge(np, 1); - else - fsl_add_bridge(np, 0); - - hose = pci_find_hose_for_OF_device(np); - max = min(max, hose->dma_window_base_cur + - hose->dma_window_size); - } -#endif - #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) diu_ops.get_pixel_format = p1022ds_get_pixel_format; diu_ops.set_gamma_table = p1022ds_set_gamma_table; @@ -601,18 +577,12 @@ static void __init p1022_ds_setup_arch(void) mpc85xx_smp_init(); -#ifdef CONFIG_SWIOTLB - if ((memblock_end_of_DRAM() - 1) > max) { - ppc_swiotlb_enable = 1; - set_pci_dma_ops(&swiotlb_dma_ops); - ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; - } -#endif + swiotlb_detect_4g(); pr_info("Freescale P1022 DS reference board\n"); } -machine_device_initcall(p1022_ds, mpc85xx_common_publish_devices); +machine_arch_initcall(p1022_ds, mpc85xx_common_publish_devices); machine_arch_initcall(p1022_ds, swiotlb_setup_bus_notifier); diff --git a/arch/powerpc/platforms/85xx/p1022_rdk.c b/arch/powerpc/platforms/85xx/p1022_rdk.c index b3cf11b..4d328aa 100644 --- a/arch/powerpc/platforms/85xx/p1022_rdk.c +++ b/arch/powerpc/platforms/85xx/p1022_rdk.c @@ -14,7 +14,6 @@ #include <linux/pci.h> #include <linux/of_platform.h> -#include <linux/memblock.h> #include <asm/div64.h> #include <asm/mpic.h> #include <asm/swiotlb.h> @@ -121,32 +120,9 @@ void __init p1022_rdk_pic_init(void) */ static void __init p1022_rdk_setup_arch(void) { -#ifdef CONFIG_PCI - struct device_node *np; -#endif - dma_addr_t max = 0xffffffff; - if (ppc_md.progress) ppc_md.progress("p1022_rdk_setup_arch()", 0); -#ifdef CONFIG_PCI - for_each_compatible_node(np, "pci", "fsl,p1022-pcie") { - struct resource rsrc; - struct pci_controller *hose; - - of_address_to_resource(np, 0, &rsrc); - - if ((rsrc.start & 0xfffff) == 0x8000) - fsl_add_bridge(np, 1); - else - fsl_add_bridge(np, 0); - - hose = pci_find_hose_for_OF_device(np); - max = min(max, hose->dma_window_base_cur + - hose->dma_window_size); - } -#endif - #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) diu_ops.set_monitor_port = p1022rdk_set_monitor_port; diu_ops.set_pixel_clock = p1022rdk_set_pixel_clock; @@ -155,18 +131,12 @@ static void __init p1022_rdk_setup_arch(void) mpc85xx_smp_init(); -#ifdef CONFIG_SWIOTLB - if ((memblock_end_of_DRAM() - 1) > max) { - ppc_swiotlb_enable = 1; - set_pci_dma_ops(&swiotlb_dma_ops); - ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; - } -#endif + swiotlb_detect_4g(); pr_info("Freescale / iVeia P1022 RDK reference board\n"); } -machine_device_initcall(p1022_rdk, mpc85xx_common_publish_devices); +machine_arch_initcall(p1022_rdk, mpc85xx_common_publish_devices); machine_arch_initcall(p1022_rdk, swiotlb_setup_bus_notifier); diff --git a/arch/powerpc/platforms/85xx/p1023_rds.c b/arch/powerpc/platforms/85xx/p1023_rds.c index 2990e8b..606eff9 100644 --- a/arch/powerpc/platforms/85xx/p1023_rds.c +++ b/arch/powerpc/platforms/85xx/p1023_rds.c @@ -80,15 +80,10 @@ static void __init mpc85xx_rds_setup_arch(void) } } -#ifdef CONFIG_PCI - for_each_compatible_node(np, "pci", "fsl,p1023-pcie") - fsl_add_bridge(np, 0); -#endif - mpc85xx_smp_init(); } -machine_device_initcall(p1023_rds, mpc85xx_common_publish_devices); +machine_arch_initcall(p1023_rds, mpc85xx_common_publish_devices); static void __init mpc85xx_rds_pic_init(void) { diff --git a/arch/powerpc/platforms/85xx/p2041_rdb.c b/arch/powerpc/platforms/85xx/p2041_rdb.c index 6541fa2..000c089 100644 --- a/arch/powerpc/platforms/85xx/p2041_rdb.c +++ b/arch/powerpc/platforms/85xx/p2041_rdb.c @@ -80,7 +80,7 @@ define_machine(p2041_rdb) { .power_save = e500_idle, }; -machine_device_initcall(p2041_rdb, corenet_ds_publish_devices); +machine_arch_initcall(p2041_rdb, corenet_ds_publish_devices); #ifdef CONFIG_SWIOTLB machine_arch_initcall(p2041_rdb, swiotlb_setup_bus_notifier); diff --git a/arch/powerpc/platforms/85xx/p3041_ds.c b/arch/powerpc/platforms/85xx/p3041_ds.c index f238efa..b3edc20 100644 --- a/arch/powerpc/platforms/85xx/p3041_ds.c +++ b/arch/powerpc/platforms/85xx/p3041_ds.c @@ -82,7 +82,7 @@ define_machine(p3041_ds) { .power_save = e500_idle, }; -machine_device_initcall(p3041_ds, corenet_ds_publish_devices); +machine_arch_initcall(p3041_ds, corenet_ds_publish_devices); #ifdef CONFIG_SWIOTLB machine_arch_initcall(p3041_ds, swiotlb_setup_bus_notifier); diff --git a/arch/powerpc/platforms/85xx/p4080_ds.c b/arch/powerpc/platforms/85xx/p4080_ds.c index c92417d..54df106 100644 --- a/arch/powerpc/platforms/85xx/p4080_ds.c +++ b/arch/powerpc/platforms/85xx/p4080_ds.c @@ -81,7 +81,7 @@ define_machine(p4080_ds) { .power_save = e500_idle, }; -machine_device_initcall(p4080_ds, corenet_ds_publish_devices); +machine_arch_initcall(p4080_ds, corenet_ds_publish_devices); #ifdef CONFIG_SWIOTLB machine_arch_initcall(p4080_ds, swiotlb_setup_bus_notifier); #endif diff --git a/arch/powerpc/platforms/85xx/p5020_ds.c b/arch/powerpc/platforms/85xx/p5020_ds.c index 17bef15..753a42c 100644 --- a/arch/powerpc/platforms/85xx/p5020_ds.c +++ b/arch/powerpc/platforms/85xx/p5020_ds.c @@ -91,7 +91,7 @@ define_machine(p5020_ds) { #endif }; -machine_device_initcall(p5020_ds, corenet_ds_publish_devices); +machine_arch_initcall(p5020_ds, corenet_ds_publish_devices); #ifdef CONFIG_SWIOTLB machine_arch_initcall(p5020_ds, swiotlb_setup_bus_notifier); diff --git a/arch/powerpc/platforms/85xx/p5040_ds.c b/arch/powerpc/platforms/85xx/p5040_ds.c index 8e22a34..1138185 100644 --- a/arch/powerpc/platforms/85xx/p5040_ds.c +++ b/arch/powerpc/platforms/85xx/p5040_ds.c @@ -82,7 +82,7 @@ define_machine(p5040_ds) { #endif }; -machine_device_initcall(p5040_ds, corenet_ds_publish_devices); +machine_arch_initcall(p5040_ds, corenet_ds_publish_devices); #ifdef CONFIG_SWIOTLB machine_arch_initcall(p5040_ds, swiotlb_setup_bus_notifier); diff --git a/arch/powerpc/platforms/85xx/qemu_e500.c b/arch/powerpc/platforms/85xx/qemu_e500.c index 3c5490c..b3f27c5 100644 --- a/arch/powerpc/platforms/85xx/qemu_e500.c +++ b/arch/powerpc/platforms/85xx/qemu_e500.c @@ -41,7 +41,6 @@ static void __init qemu_e500_setup_arch(void) { ppc_md.progress("qemu_e500_setup_arch()", 0); - fsl_pci_init(); swiotlb_detect_4g(); mpc85xx_smp_init(); } @@ -56,7 +55,7 @@ static int __init qemu_e500_probe(void) return !!of_flat_dt_is_compatible(root, "fsl,qemu-e500"); } -machine_device_initcall(qemu_e500, mpc85xx_common_publish_devices); +machine_arch_initcall(qemu_e500, mpc85xx_common_publish_devices); define_machine(qemu_e500) { .name = "QEMU e500", diff --git a/arch/powerpc/platforms/85xx/sbc8548.c b/arch/powerpc/platforms/85xx/sbc8548.c index cd3a66b..2825a62 100644 --- a/arch/powerpc/platforms/85xx/sbc8548.c +++ b/arch/powerpc/platforms/85xx/sbc8548.c @@ -88,26 +88,9 @@ static int __init sbc8548_hw_rev(void) */ static void __init sbc8548_setup_arch(void) { -#ifdef CONFIG_PCI - struct device_node *np; -#endif - if (ppc_md.progress) ppc_md.progress("sbc8548_setup_arch()", 0); -#ifdef CONFIG_PCI - for_each_node_by_type(np, "pci") { - if (of_device_is_compatible(np, "fsl,mpc8540-pci") || - of_device_is_compatible(np, "fsl,mpc8548-pcie")) { - struct resource rsrc; - of_address_to_resource(np, 0, &rsrc); - if ((rsrc.start & 0xfffff) == 0x8000) - fsl_add_bridge(np, 1); - else - fsl_add_bridge(np, 0); - } - } -#endif sbc_rev = sbc8548_hw_rev(); } @@ -128,7 +111,7 @@ static void sbc8548_show_cpuinfo(struct seq_file *m) seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f)); } -machine_device_initcall(sbc8548, mpc85xx_common_publish_devices); +machine_arch_initcall(sbc8548, mpc85xx_common_publish_devices); /* * Called very early, device-tree isn't unflattened diff --git a/arch/powerpc/platforms/85xx/socrates.c b/arch/powerpc/platforms/85xx/socrates.c index b9c6daa..381463e 100644 --- a/arch/powerpc/platforms/85xx/socrates.c +++ b/arch/powerpc/platforms/85xx/socrates.c @@ -66,20 +66,11 @@ static void __init socrates_pic_init(void) */ static void __init socrates_setup_arch(void) { -#ifdef CONFIG_PCI - struct device_node *np; -#endif - if (ppc_md.progress) ppc_md.progress("socrates_setup_arch()", 0); - -#ifdef CONFIG_PCI - for_each_compatible_node(np, "pci", "fsl,mpc8540-pci") - fsl_add_bridge(np, 1); -#endif } -machine_device_initcall(socrates, mpc85xx_common_publish_devices); +machine_arch_initcall(socrates, mpc85xx_common_publish_devices); /* * Called very early, device-tree isn't unflattened diff --git a/arch/powerpc/platforms/85xx/stx_gp3.c b/arch/powerpc/platforms/85xx/stx_gp3.c index e050800..bb1b1a7 100644 --- a/arch/powerpc/platforms/85xx/stx_gp3.c +++ b/arch/powerpc/platforms/85xx/stx_gp3.c @@ -60,21 +60,12 @@ static void __init stx_gp3_pic_init(void) */ static void __init stx_gp3_setup_arch(void) { -#ifdef CONFIG_PCI - struct device_node *np; -#endif - if (ppc_md.progress) ppc_md.progress("stx_gp3_setup_arch()", 0); #ifdef CONFIG_CPM2 cpm2_reset(); #endif - -#ifdef CONFIG_PCI - for_each_compatible_node(np, "pci", "fsl,mpc8540-pci") - fsl_add_bridge(np, 1); -#endif } static void stx_gp3_show_cpuinfo(struct seq_file *m) @@ -93,7 +84,7 @@ static void stx_gp3_show_cpuinfo(struct seq_file *m) seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f)); } -machine_device_initcall(stx_gp3, mpc85xx_common_publish_devices); +machine_arch_initcall(stx_gp3, mpc85xx_common_publish_devices); /* * Called very early, device-tree isn't unflattened diff --git a/arch/powerpc/platforms/85xx/tqm85xx.c b/arch/powerpc/platforms/85xx/tqm85xx.c index 4d786c2..c8ef526 100644 --- a/arch/powerpc/platforms/85xx/tqm85xx.c +++ b/arch/powerpc/platforms/85xx/tqm85xx.c @@ -59,31 +59,12 @@ static void __init tqm85xx_pic_init(void) */ static void __init tqm85xx_setup_arch(void) { -#ifdef CONFIG_PCI - struct device_node *np; -#endif - if (ppc_md.progress) ppc_md.progress("tqm85xx_setup_arch()", 0); #ifdef CONFIG_CPM2 cpm2_reset(); #endif - -#ifdef CONFIG_PCI - for_each_node_by_type(np, "pci") { - if (of_device_is_compatible(np, "fsl,mpc8540-pci") || - of_device_is_compatible(np, "fsl,mpc8548-pcie")) { - struct resource rsrc; - if (!of_address_to_resource(np, 0, &rsrc)) { - if ((rsrc.start & 0xfffff) == 0x8000) - fsl_add_bridge(np, 1); - else - fsl_add_bridge(np, 0); - } - } - } -#endif } static void tqm85xx_show_cpuinfo(struct seq_file *m) @@ -123,7 +104,7 @@ static void __init tqm85xx_ti1520_fixup(struct pci_dev *pdev) DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, tqm85xx_ti1520_fixup); -machine_device_initcall(tqm85xx, mpc85xx_common_publish_devices); +machine_arch_initcall(tqm85xx, mpc85xx_common_publish_devices); static const char *board[] __initdata = { "tqc,tqm8540", diff --git a/arch/powerpc/platforms/85xx/xes_mpc85xx.c b/arch/powerpc/platforms/85xx/xes_mpc85xx.c index 41c6875..7c9cf6b 100644 --- a/arch/powerpc/platforms/85xx/xes_mpc85xx.c +++ b/arch/powerpc/platforms/85xx/xes_mpc85xx.c @@ -111,18 +111,11 @@ static void xes_mpc85xx_fixups(void) } } -#ifdef CONFIG_PCI -static int primary_phb_addr; -#endif - /* * Setup the architecture */ static void __init xes_mpc85xx_setup_arch(void) { -#ifdef CONFIG_PCI - struct device_node *np; -#endif struct device_node *root; const char *model = "Unknown"; @@ -137,26 +130,12 @@ static void __init xes_mpc85xx_setup_arch(void) xes_mpc85xx_fixups(); -#ifdef CONFIG_PCI - for_each_node_by_type(np, "pci") { - if (of_device_is_compatible(np, "fsl,mpc8540-pci") || - of_device_is_compatible(np, "fsl,mpc8548-pcie")) { - struct resource rsrc; - of_address_to_resource(np, 0, &rsrc); - if ((rsrc.start & 0xfffff) == primary_phb_addr) - fsl_add_bridge(np, 1); - else - fsl_add_bridge(np, 0); - } - } -#endif - mpc85xx_smp_init(); } -machine_device_initcall(xes_mpc8572, mpc85xx_common_publish_devices); -machine_device_initcall(xes_mpc8548, mpc85xx_common_publish_devices); -machine_device_initcall(xes_mpc8540, mpc85xx_common_publish_devices); +machine_arch_initcall(xes_mpc8572, mpc85xx_common_publish_devices); +machine_arch_initcall(xes_mpc8548, mpc85xx_common_publish_devices); +machine_arch_initcall(xes_mpc8540, mpc85xx_common_publish_devices); /* * Called very early, device-tree isn't unflattened @@ -165,42 +144,21 @@ static int __init xes_mpc8572_probe(void) { unsigned long root = of_get_flat_dt_root(); - if (of_flat_dt_is_compatible(root, "xes,MPC8572")) { -#ifdef CONFIG_PCI - primary_phb_addr = 0x8000; -#endif - return 1; - } else { - return 0; - } + return of_flat_dt_is_compatible(root, "xes,MPC8572"); } static int __init xes_mpc8548_probe(void) { unsigned long root = of_get_flat_dt_root(); - if (of_flat_dt_is_compatible(root, "xes,MPC8548")) { -#ifdef CONFIG_PCI - primary_phb_addr = 0xb000; -#endif - return 1; - } else { - return 0; - } + return of_flat_dt_is_compatible(root, "xes,MPC8548"); } static int __init xes_mpc8540_probe(void) { unsigned long root = of_get_flat_dt_root(); - if (of_flat_dt_is_compatible(root, "xes,MPC8540")) { -#ifdef CONFIG_PCI - primary_phb_addr = 0xb000; -#endif - return 1; - } else { - return 0; - } + return of_flat_dt_is_compatible(root, "xes,MPC8540"); } define_machine(xes_mpc8572) { diff --git a/arch/powerpc/platforms/86xx/gef_ppc9a.c b/arch/powerpc/platforms/86xx/gef_ppc9a.c index 1fca663..6c7ddb3 100644 --- a/arch/powerpc/platforms/86xx/gef_ppc9a.c +++ b/arch/powerpc/platforms/86xx/gef_ppc9a.c @@ -73,13 +73,6 @@ static void __init gef_ppc9a_init_irq(void) static void __init gef_ppc9a_setup_arch(void) { struct device_node *regs; -#ifdef CONFIG_PCI - struct device_node *np; - - for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") { - fsl_add_bridge(np, 1); - } -#endif printk(KERN_INFO "GE Intelligent Platforms PPC9A 6U VME SBC\n"); @@ -221,6 +214,7 @@ static long __init mpc86xx_time_init(void) static __initdata struct of_device_id of_bus_ids[] = { { .compatible = "simple-bus", }, { .compatible = "gianfar", }, + { .compatible = "fsl,mpc8641-pcie", }, {}, }; @@ -231,7 +225,7 @@ static int __init declare_of_platform_devices(void) return 0; } -machine_device_initcall(gef_ppc9a, declare_of_platform_devices); +machine_arch_initcall(gef_ppc9a, declare_of_platform_devices); define_machine(gef_ppc9a) { .name = "GE PPC9A", diff --git a/arch/powerpc/platforms/86xx/gef_sbc310.c b/arch/powerpc/platforms/86xx/gef_sbc310.c index 14e0e576..2195ac7 100644 --- a/arch/powerpc/platforms/86xx/gef_sbc310.c +++ b/arch/powerpc/platforms/86xx/gef_sbc310.c @@ -73,14 +73,6 @@ static void __init gef_sbc310_init_irq(void) static void __init gef_sbc310_setup_arch(void) { struct device_node *regs; -#ifdef CONFIG_PCI - struct device_node *np; - - for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") { - fsl_add_bridge(np, 1); - } -#endif - printk(KERN_INFO "GE Intelligent Platforms SBC310 6U VPX SBC\n"); #ifdef CONFIG_SMP @@ -209,6 +201,7 @@ static long __init mpc86xx_time_init(void) static __initdata struct of_device_id of_bus_ids[] = { { .compatible = "simple-bus", }, { .compatible = "gianfar", }, + { .compatible = "fsl,mpc8641-pcie", }, {}, }; @@ -219,7 +212,7 @@ static int __init declare_of_platform_devices(void) return 0; } -machine_device_initcall(gef_sbc310, declare_of_platform_devices); +machine_arch_initcall(gef_sbc310, declare_of_platform_devices); define_machine(gef_sbc310) { .name = "GE SBC310", diff --git a/arch/powerpc/platforms/86xx/gef_sbc610.c b/arch/powerpc/platforms/86xx/gef_sbc610.c index 1638f43..52fd6d7 100644 --- a/arch/powerpc/platforms/86xx/gef_sbc610.c +++ b/arch/powerpc/platforms/86xx/gef_sbc610.c @@ -73,13 +73,6 @@ static void __init gef_sbc610_init_irq(void) static void __init gef_sbc610_setup_arch(void) { struct device_node *regs; -#ifdef CONFIG_PCI - struct device_node *np; - - for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") { - fsl_add_bridge(np, 1); - } -#endif printk(KERN_INFO "GE Intelligent Platforms SBC610 6U VPX SBC\n"); @@ -198,6 +191,7 @@ static long __init mpc86xx_time_init(void) static __initdata struct of_device_id of_bus_ids[] = { { .compatible = "simple-bus", }, { .compatible = "gianfar", }, + { .compatible = "fsl,mpc8641-pcie", }, {}, }; @@ -208,7 +202,7 @@ static int __init declare_of_platform_devices(void) return 0; } -machine_device_initcall(gef_sbc610, declare_of_platform_devices); +machine_arch_initcall(gef_sbc610, declare_of_platform_devices); define_machine(gef_sbc610) { .name = "GE SBC610", diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c index 62cd3c5..a8229f3 100644 --- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c +++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c @@ -91,6 +91,9 @@ static struct of_device_id __initdata mpc8610_ids[] = { { .compatible = "simple-bus", }, /* So that the DMA channel nodes can be probed individually: */ { .compatible = "fsl,eloplus-dma", }, + /* PCI controllers */ + { .compatible = "fsl,mpc8610-pci", }, + { .compatible = "fsl,mpc8641-pcie", }, {} }; @@ -107,7 +110,7 @@ static int __init mpc8610_declare_of_platform_devices(void) return 0; } -machine_device_initcall(mpc86xx_hpcd, mpc8610_declare_of_platform_devices); +machine_arch_initcall(mpc86xx_hpcd, mpc8610_declare_of_platform_devices); #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) @@ -278,25 +281,11 @@ mpc8610hpcd_valid_monitor_port(enum fsl_diu_monitor_port port) static void __init mpc86xx_hpcd_setup_arch(void) { struct resource r; - struct device_node *np; unsigned char *pixis; if (ppc_md.progress) ppc_md.progress("mpc86xx_hpcd_setup_arch()", 0); -#ifdef CONFIG_PCI - for_each_node_by_type(np, "pci") { - if (of_device_is_compatible(np, "fsl,mpc8610-pci") - || of_device_is_compatible(np, "fsl,mpc8641-pcie")) { - struct resource rsrc; - of_address_to_resource(np, 0, &rsrc); - if ((rsrc.start & 0xfffff) == 0xa000) - fsl_add_bridge(np, 1); - else - fsl_add_bridge(np, 0); - } - } -#endif #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) diu_ops.get_pixel_format = mpc8610hpcd_get_pixel_format; diu_ops.set_gamma_table = mpc8610hpcd_set_gamma_table; diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c index 817245b..182cbe6 100644 --- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c +++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c @@ -19,7 +19,6 @@ #include <linux/delay.h> #include <linux/seq_file.h> #include <linux/of_platform.h> -#include <linux/memblock.h> #include <asm/time.h> #include <asm/machdep.h> @@ -51,15 +50,8 @@ extern int uli_exclude_device(struct pci_controller *hose, static int mpc86xx_exclude_device(struct pci_controller *hose, u_char bus, u_char devfn) { - struct device_node* node; - struct resource rsrc; - - node = hose->dn; - of_address_to_resource(node, 0, &rsrc); - - if ((rsrc.start & 0xfffff) == 0x8000) { + if (hose->dn == fsl_pci_primary) return uli_exclude_device(hose, bus, devfn); - } return PCIBIOS_SUCCESSFUL; } @@ -69,30 +61,11 @@ static int mpc86xx_exclude_device(struct pci_controller *hose, static void __init mpc86xx_hpcn_setup_arch(void) { -#ifdef CONFIG_PCI - struct device_node *np; - struct pci_controller *hose; -#endif - dma_addr_t max = 0xffffffff; - if (ppc_md.progress) ppc_md.progress("mpc86xx_hpcn_setup_arch()", 0); #ifdef CONFIG_PCI - for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") { - struct resource rsrc; - of_address_to_resource(np, 0, &rsrc); - if ((rsrc.start & 0xfffff) == 0x8000) - fsl_add_bridge(np, 1); - else - fsl_add_bridge(np, 0); - hose = pci_find_hose_for_OF_device(np); - max = min(max, hose->dma_window_base_cur + - hose->dma_window_size); - } - ppc_md.pci_exclude_device = mpc86xx_exclude_device; - #endif printk("MPC86xx HPCN board from Freescale Semiconductor\n"); @@ -101,13 +74,7 @@ mpc86xx_hpcn_setup_arch(void) mpc86xx_smp_init(); #endif -#ifdef CONFIG_SWIOTLB - if ((memblock_end_of_DRAM() - 1) > max) { - ppc_swiotlb_enable = 1; - set_pci_dma_ops(&swiotlb_dma_ops); - ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; - } -#endif + swiotlb_detect_4g(); } @@ -162,6 +129,7 @@ static __initdata struct of_device_id of_bus_ids[] = { { .compatible = "simple-bus", }, { .compatible = "fsl,srio", }, { .compatible = "gianfar", }, + { .compatible = "fsl,mpc8641-pcie", }, {}, }; @@ -171,7 +139,7 @@ static int __init declare_of_platform_devices(void) return 0; } -machine_device_initcall(mpc86xx_hpcn, declare_of_platform_devices); +machine_arch_initcall(mpc86xx_hpcn, declare_of_platform_devices); machine_arch_initcall(mpc86xx_hpcn, swiotlb_setup_bus_notifier); define_machine(mpc86xx_hpcn) { diff --git a/arch/powerpc/platforms/86xx/sbc8641d.c b/arch/powerpc/platforms/86xx/sbc8641d.c index e7007d0..52afebf 100644 --- a/arch/powerpc/platforms/86xx/sbc8641d.c +++ b/arch/powerpc/platforms/86xx/sbc8641d.c @@ -38,18 +38,9 @@ static void __init sbc8641_setup_arch(void) { -#ifdef CONFIG_PCI - struct device_node *np; -#endif - if (ppc_md.progress) ppc_md.progress("sbc8641_setup_arch()", 0); -#ifdef CONFIG_PCI - for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") - fsl_add_bridge(np, 0); -#endif - printk("SBC8641 board from Wind River\n"); #ifdef CONFIG_SMP @@ -102,6 +93,7 @@ mpc86xx_time_init(void) static __initdata struct of_device_id of_bus_ids[] = { { .compatible = "simple-bus", }, { .compatible = "gianfar", }, + { .compatible = "fsl,mpc8641-pcie", }, {}, }; @@ -111,7 +103,7 @@ static int __init declare_of_platform_devices(void) return 0; } -machine_device_initcall(sbc8641, declare_of_platform_devices); +machine_arch_initcall(sbc8641, declare_of_platform_devices); define_machine(sbc8641) { .name = "SBC8641D", diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index da7a3d7..6408d9d 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c @@ -826,54 +826,78 @@ static const struct of_device_id pci_ids[] = { struct device_node *fsl_pci_primary; -void __devinit fsl_pci_init(void) +/* Checkout if PCI contains ISA node */ +static int of_pci_has_isa(struct device_node *pci_node) +{ + struct device_node *np; + int ret = 0; + + if (!pci_node) + return 0; + + read_lock(&devtree_lock); + np = pci_node->allnext; + + /* Only scan the children of PCI node */ + for (; np != pci_node->sibling; np = np->allnext) { + if (np->type && (of_node_cmp(np->type, "isa") == 0) + && of_node_get(np)) { + ret = 1; + break; + } + } + + of_node_put(pci_node); + read_unlock(&devtree_lock); + + return ret; +} + +static int __devinit fsl_pci_probe(struct platform_device *pdev) { int ret; - struct device_node *node; struct pci_controller *hose; - dma_addr_t max = 0xffffffff; + int is_primary = 0; - /* Callers can specify the primary bus using other means. */ if (!fsl_pci_primary) { - /* If a PCI host bridge contains an ISA node, it's primary. */ - node = of_find_node_by_type(NULL, "isa"); - while ((fsl_pci_primary = of_get_parent(node))) { - of_node_put(node); - node = fsl_pci_primary; - - if (of_match_node(pci_ids, node)) - break; - } + is_primary = of_pci_has_isa(pdev->dev.of_node); + if (is_primary) + fsl_pci_primary = pdev->dev.of_node; } - node = NULL; - for_each_node_by_type(node, "pci") { - if (of_match_node(pci_ids, node)) { - /* - * If there's no PCI host bridge with ISA, arbitrarily - * designate one as primary. This can go away once - * various bugs with primary-less systems are fixed. - */ - if (!fsl_pci_primary) - fsl_pci_primary = node; - - ret = fsl_add_bridge(node, fsl_pci_primary == node); - if (ret == 0) { - hose = pci_find_hose_for_OF_device(node); - max = min(max, hose->dma_window_base_cur + - hose->dma_window_size); - } - } - } + ret = fsl_add_bridge(pdev->dev.of_node, is_primary); #ifdef CONFIG_SWIOTLB - /* - * if we couldn't map all of DRAM via the dma windows - * we need SWIOTLB to handle buffers located outside of - * dma capable memory region - */ - if (memblock_end_of_DRAM() - 1 > max) - ppc_swiotlb_enable = 1; + if (ret == 0) { + hose = pci_find_hose_for_OF_device(pdev->dev.of_node); + + /* + * if we couldn't map all of DRAM via the dma windows + * we need SWIOTLB to handle buffers located outside of + * dma capable memory region + */ + if (memblock_end_of_DRAM() - 1 > hose->dma_window_base_cur + + hose->dma_window_size) + ppc_swiotlb_enable = 1; + } #endif + + mpc85xx_pci_err_probe(pdev); + + return 0; +} + +static struct platform_driver fsl_pci_driver = { + .driver = { + .name = "fsl-pci", + .of_match_table = pci_ids, + }, + .probe = fsl_pci_probe, +}; + +static int __init fsl_pci_init(void) +{ + return platform_driver_register(&fsl_pci_driver); } +arch_initcall(fsl_pci_init); #endif diff --git a/arch/powerpc/sysdev/fsl_pci.h b/arch/powerpc/sysdev/fsl_pci.h index baa0fd1..ad54147 100644 --- a/arch/powerpc/sysdev/fsl_pci.h +++ b/arch/powerpc/sysdev/fsl_pci.h @@ -95,10 +95,13 @@ u64 fsl_pci_immrbar_base(struct pci_controller *hose); extern struct device_node *fsl_pci_primary; -#ifdef CONFIG_FSL_PCI -void fsl_pci_init(void); +#ifdef CONFIG_EDAC_MPC85XX +int mpc85xx_pci_err_probe(struct platform_device *op); #else -static inline void fsl_pci_init(void) {} +static inline int mpc85xx_pci_err_probe(struct platform_device *op) +{ + return -ENOTSUPP; +} #endif #endif /* __POWERPC_FSL_PCI_H */ diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c index 0e37462..2677883 100644 --- a/drivers/edac/mpc85xx_edac.c +++ b/drivers/edac/mpc85xx_edac.c @@ -200,7 +200,7 @@ static irqreturn_t mpc85xx_pci_isr(int irq, void *dev_id) return IRQ_HANDLED; } -static int __devinit mpc85xx_pci_err_probe(struct platform_device *op) +int __devinit mpc85xx_pci_err_probe(struct platform_device *op) { struct edac_pci_ctl_info *pci; struct mpc85xx_pci_pdata *pdata; @@ -214,6 +214,16 @@ static int __devinit mpc85xx_pci_err_probe(struct platform_device *op) if (!pci) return -ENOMEM; + /* make sure error reporting method is sane */ + switch (edac_op_state) { + case EDAC_OPSTATE_POLL: + case EDAC_OPSTATE_INT: + break; + default: + edac_op_state = EDAC_OPSTATE_INT; + break; + } + pdata = pci->pvt_info; pdata->name = "mpc85xx_pci_err"; pdata->irq = NO_IRQ; @@ -303,6 +313,7 @@ err: devres_release_group(&op->dev, mpc85xx_pci_err_probe); return res; } +EXPORT_SYMBOL_GPL(mpc85xx_pci_err_probe); static int mpc85xx_pci_err_remove(struct platform_device *op) { @@ -326,27 +337,6 @@ static int mpc85xx_pci_err_remove(struct platform_device *op) return 0; } -static struct of_device_id mpc85xx_pci_err_of_match[] = { - { - .compatible = "fsl,mpc8540-pcix", - }, - { - .compatible = "fsl,mpc8540-pci", - }, - {}, -}; -MODULE_DEVICE_TABLE(of, mpc85xx_pci_err_of_match); - -static struct platform_driver mpc85xx_pci_err_driver = { - .probe = mpc85xx_pci_err_probe, - .remove = __devexit_p(mpc85xx_pci_err_remove), - .driver = { - .name = "mpc85xx_pci_err", - .owner = THIS_MODULE, - .of_match_table = mpc85xx_pci_err_of_match, - }, -}; - #endif /* CONFIG_PCI */ /**************************** L2 Err device ***************************/ @@ -1193,12 +1183,6 @@ static int __init mpc85xx_mc_init(void) if (res) printk(KERN_WARNING EDAC_MOD_STR "L2 fails to register\n"); -#ifdef CONFIG_PCI - res = platform_driver_register(&mpc85xx_pci_err_driver); - if (res) - printk(KERN_WARNING EDAC_MOD_STR "PCI fails to register\n"); -#endif - #ifdef CONFIG_FSL_SOC_BOOKE pvr = mfspr(SPRN_PVR); @@ -1235,9 +1219,6 @@ static void __exit mpc85xx_mc_exit(void) on_each_cpu(mpc85xx_mc_restore_hid1, NULL, 0); } #endif -#ifdef CONFIG_PCI - platform_driver_unregister(&mpc85xx_pci_err_driver); -#endif platform_driver_unregister(&mpc85xx_l2_err_driver); platform_driver_unregister(&mpc85xx_mc_err_driver); } -- 1.7.5.1 ^ permalink raw reply related [flat|nested] 28+ messages in thread
* Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code 2012-08-03 10:14 ` [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code Jia Hongtao @ 2012-08-03 16:27 ` Scott Wood 2012-08-06 3:07 ` Jia Hongtao-B38951 0 siblings, 1 reply; 28+ messages in thread From: Scott Wood @ 2012-08-03 16:27 UTC (permalink / raw) To: Jia Hongtao; +Cc: B07421, linuxppc-dev On 08/03/2012 05:14 AM, Jia Hongtao wrote: > -void __devinit fsl_pci_init(void) > +/* Checkout if PCI contains ISA node */ > +static int of_pci_has_isa(struct device_node *pci_node) > +{ > + struct device_node *np; > + int ret = 0; > + > + if (!pci_node) > + return 0; > + > + read_lock(&devtree_lock); > + np = pci_node->allnext; > + > + /* Only scan the children of PCI node */ > + for (; np != pci_node->sibling; np = np->allnext) { > + if (np->type && (of_node_cmp(np->type, "isa") == 0) > + && of_node_get(np)) { > + ret = 1; > + break; > + } > + } > + > + of_node_put(pci_node); > + read_unlock(&devtree_lock); > + > + return ret; > +} Why do you keep insisting on substituting your ISA search code here? What advantages does it have over the code that is already there? It unnecessarily digs into the internals of the tree representation. > + > +static int __devinit fsl_pci_probe(struct platform_device *pdev) > { > int ret; > - struct device_node *node; > struct pci_controller *hose; > - dma_addr_t max = 0xffffffff; > + int is_primary = 0; > > - /* Callers can specify the primary bus using other means. */ > if (!fsl_pci_primary) { > - /* If a PCI host bridge contains an ISA node, it's primary. */ > - node = of_find_node_by_type(NULL, "isa"); > - while ((fsl_pci_primary = of_get_parent(node))) { > - of_node_put(node); > - node = fsl_pci_primary; > - > - if (of_match_node(pci_ids, node)) > - break; > - } > + is_primary = of_pci_has_isa(pdev->dev.of_node); > + if (is_primary) > + fsl_pci_primary = pdev->dev.of_node; > } As I explained before, this has to be done globally, not from the probe function, so we can assign a default primary bus if there isn't any ISA. There are bugs in the Linux PPC PCI code relating to not having any primary bus. -Scott ^ permalink raw reply [flat|nested] 28+ messages in thread
* RE: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code 2012-08-03 16:27 ` Scott Wood @ 2012-08-06 3:07 ` Jia Hongtao-B38951 2012-08-06 15:09 ` Scott Wood 0 siblings, 1 reply; 28+ messages in thread From: Jia Hongtao-B38951 @ 2012-08-06 3:07 UTC (permalink / raw) To: Wood Scott-B07421; +Cc: linuxppc-dev@lists.ozlabs.org, Li Yang-R58472 DQoNCj4gLS0tLS1PcmlnaW5hbCBNZXNzYWdlLS0tLS0NCj4gRnJvbTogV29vZCBTY290dC1CMDc0 MjENCj4gU2VudDogU2F0dXJkYXksIEF1Z3VzdCAwNCwgMjAxMiAxMjoyOCBBTQ0KPiBUbzogSmlh IEhvbmd0YW8tQjM4OTUxDQo+IENjOiBsaW51eHBwYy1kZXZAbGlzdHMub3psYWJzLm9yZzsgZ2Fs YWtAa2VybmVsLmNyYXNoaW5nLm9yZzsgTGkgWWFuZy0NCj4gUjU4NDcyOyBXb29kIFNjb3R0LUIw NzQyMQ0KPiBTdWJqZWN0OiBSZTogW1BBVENIIFY1IDMvM10gcG93ZXJwYy9mc2wtcGNpOiBVbmlm eSBwY2kvcGNpZQ0KPiBpbml0aWFsaXphdGlvbiBjb2RlDQo+IA0KPiBPbiAwOC8wMy8yMDEyIDA1 OjE0IEFNLCBKaWEgSG9uZ3RhbyB3cm90ZToNCj4gPiAtdm9pZCBfX2RldmluaXQgZnNsX3BjaV9p bml0KHZvaWQpDQo+ID4gKy8qIENoZWNrb3V0IGlmIFBDSSBjb250YWlucyBJU0Egbm9kZSAqLw0K PiA+ICtzdGF0aWMgaW50IG9mX3BjaV9oYXNfaXNhKHN0cnVjdCBkZXZpY2Vfbm9kZSAqcGNpX25v ZGUpDQo+ID4gK3sNCj4gPiArCXN0cnVjdCBkZXZpY2Vfbm9kZSAqbnA7DQo+ID4gKwlpbnQgcmV0 ID0gMDsNCj4gPiArDQo+ID4gKwlpZiAoIXBjaV9ub2RlKQ0KPiA+ICsJCXJldHVybiAwOw0KPiA+ ICsNCj4gPiArCXJlYWRfbG9jaygmZGV2dHJlZV9sb2NrKTsNCj4gPiArCW5wID0gcGNpX25vZGUt PmFsbG5leHQ7DQo+ID4gKw0KPiA+ICsJLyogT25seSBzY2FuIHRoZSBjaGlsZHJlbiBvZiBQQ0kg bm9kZSAqLw0KPiA+ICsJZm9yICg7IG5wICE9IHBjaV9ub2RlLT5zaWJsaW5nOyBucCA9IG5wLT5h bGxuZXh0KSB7DQo+ID4gKwkJaWYgKG5wLT50eXBlICYmIChvZl9ub2RlX2NtcChucC0+dHlwZSwg ImlzYSIpID09IDApDQo+ID4gKwkJICAgICYmIG9mX25vZGVfZ2V0KG5wKSkgew0KPiA+ICsJCQly ZXQgPSAxOw0KPiA+ICsJCQlicmVhazsNCj4gPiArCQl9DQo+ID4gKwl9DQo+ID4gKw0KPiA+ICsJ b2Zfbm9kZV9wdXQocGNpX25vZGUpOw0KPiA+ICsJcmVhZF91bmxvY2soJmRldnRyZWVfbG9jayk7 DQo+ID4gKw0KPiA+ICsJcmV0dXJuIHJldDsNCj4gPiArfQ0KPiANCj4gV2h5IGRvIHlvdSBrZWVw IGluc2lzdGluZyBvbiBzdWJzdGl0dXRpbmcgeW91ciBJU0Egc2VhcmNoIGNvZGUgaGVyZT8NCj4g V2hhdCBhZHZhbnRhZ2VzIGRvZXMgaXQgaGF2ZSBvdmVyIHRoZSBjb2RlIHRoYXQgaXMgYWxyZWFk eSB0aGVyZT8gIEl0DQo+IHVubmVjZXNzYXJpbHkgZGlncyBpbnRvIHRoZSBpbnRlcm5hbHMgb2Yg dGhlIHRyZWUgcmVwcmVzZW50YXRpb24uDQo+IA0KDQpJIHdhbnQgSVNBIHNlYXJjaCBpcyBkb25l IGZyb20gcHJvYmUuIEFsc28gdGhpcyB3YXkgaXMgbW9yZSBlZmZpY2llbnQgZHVlDQp0byB3ZSBq dXN0IHNlYXJjaCB0aGUgY2hpbGRyZW4gb2YgUENJLg0KDQo+ID4gKw0KPiA+ICtzdGF0aWMgaW50 IF9fZGV2aW5pdCBmc2xfcGNpX3Byb2JlKHN0cnVjdCBwbGF0Zm9ybV9kZXZpY2UgKnBkZXYpDQo+ ID4gIHsNCj4gPiAgCWludCByZXQ7DQo+ID4gLQlzdHJ1Y3QgZGV2aWNlX25vZGUgKm5vZGU7DQo+ ID4gIAlzdHJ1Y3QgcGNpX2NvbnRyb2xsZXIgKmhvc2U7DQo+ID4gLQlkbWFfYWRkcl90IG1heCA9 IDB4ZmZmZmZmZmY7DQo+ID4gKwlpbnQgaXNfcHJpbWFyeSA9IDA7DQo+ID4NCj4gPiAtCS8qIENh bGxlcnMgY2FuIHNwZWNpZnkgdGhlIHByaW1hcnkgYnVzIHVzaW5nIG90aGVyIG1lYW5zLiAqLw0K PiA+ICAJaWYgKCFmc2xfcGNpX3ByaW1hcnkpIHsNCj4gPiAtCQkvKiBJZiBhIFBDSSBob3N0IGJy aWRnZSBjb250YWlucyBhbiBJU0Egbm9kZSwgaXQncyBwcmltYXJ5Lg0KPiAqLw0KPiA+IC0JCW5v ZGUgPSBvZl9maW5kX25vZGVfYnlfdHlwZShOVUxMLCAiaXNhIik7DQo+ID4gLQkJd2hpbGUgKChm c2xfcGNpX3ByaW1hcnkgPSBvZl9nZXRfcGFyZW50KG5vZGUpKSkgew0KPiA+IC0JCQlvZl9ub2Rl X3B1dChub2RlKTsNCj4gPiAtCQkJbm9kZSA9IGZzbF9wY2lfcHJpbWFyeTsNCj4gPiAtDQo+ID4g LQkJCWlmIChvZl9tYXRjaF9ub2RlKHBjaV9pZHMsIG5vZGUpKQ0KPiA+IC0JCQkJYnJlYWs7DQo+ ID4gLQkJfQ0KPiA+ICsJCWlzX3ByaW1hcnkgPSBvZl9wY2lfaGFzX2lzYShwZGV2LT5kZXYub2Zf bm9kZSk7DQo+ID4gKwkJaWYgKGlzX3ByaW1hcnkpDQo+ID4gKwkJCWZzbF9wY2lfcHJpbWFyeSA9 IHBkZXYtPmRldi5vZl9ub2RlOw0KPiA+ICAJfQ0KPiANCj4gQXMgSSBleHBsYWluZWQgYmVmb3Jl LCB0aGlzIGhhcyB0byBiZSBkb25lIGdsb2JhbGx5LCBub3QgZnJvbSB0aGUgcHJvYmUNCj4gZnVu Y3Rpb24sIHNvIHdlIGNhbiBhc3NpZ24gYSBkZWZhdWx0IHByaW1hcnkgYnVzIGlmIHRoZXJlIGlz bid0IGFueSBJU0EuDQo+ICBUaGVyZSBhcmUgYnVncyBpbiB0aGUgTGludXggUFBDIFBDSSBjb2Rl IHJlbGF0aW5nIHRvIG5vdCBoYXZpbmcgYW55DQo+IHByaW1hcnkgYnVzLg0KPiANCj4gLVNjb3R0 DQoNCkluIG15IHdheSBvZiBzZWFyY2hpbmcgSVNBIHlvdSBjYW4gYWxzbyBhc3NpZ24gYSBkZWZh dWx0IHByaW1hcnkgYnVzIGluIGJvYXJkDQpzcGVjaWZpYyBmaWxlcy4gDQoNCkkgcmVhZCB5b3Vy IGNvZGUgYW5kIGZvdW5kIHRoYXQgaWYgdGhlcmUgaXMgbm8gSVNBIG5vZGUgeW91IHdpbGwgYXNz aWduIHRoZQ0KZmlyc3QgUENJIGJ1cyBzY2FubmVkIGFzIHByaW1hcnkuIEl0J3Mgbm90IGFsbCBy aWdodC4gVGFrZSBnZV9pbXAzYSBhcyBhbg0KZXhhbXBsZTogVGhlIHNlY29uZCBQQ0kgYnVzICg5 MDAwKSBpcyBwcmltYXJ5IG5vdCB0aGUgZmlyc3Qgb25lLg0KDQpJIGRvdWJ0IHRoYXQgdGhlcmUg YXJlIGJ1Z3MgaWYgbm8gcHJpbWFyeSBhc3NpZ25lZC4gTGlrZSBtcGM4NXh4X3JkYiBhc3NpZ25l ZA0Kbm8gcHJpbWFyeSBhdCBhbGwuIFNvbWUgb3RoZXIgYm9hcmRzIGhhcyBubyBwcmltYXJ5IGV0 aGVyIGxpa2UgcDEwMjJkcywgcDEwMjFtZHMsDQpwMTAxMHJkYiwgcDEwMjNyZHMsIGFsbCBjb3Jl bmV0IGJvYXJkcyAocDIwNDFfcmRiLCBwMzA0MV9kcywgcDQwODBfZHMsIHA1MDIwX2RzLA0KcDUw NDBfZHMpLiBJZiBubyBwcmltYXJ5IGlzIGEgYnVnIHRoZW4gYWxsIHRoZXNlIGJvYXJkcyBhYm92 ZSBhcmUgbm90IGNvcnJlY3RseQ0Kc2V0dGluZyB1cC4NCg0KLUhvbmd0YW8uIA0KIA0KDQo= ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code 2012-08-06 3:07 ` Jia Hongtao-B38951 @ 2012-08-06 15:09 ` Scott Wood 2012-08-07 4:20 ` Li Yang 2012-08-07 8:09 ` Jia Hongtao-B38951 0 siblings, 2 replies; 28+ messages in thread From: Scott Wood @ 2012-08-06 15:09 UTC (permalink / raw) To: Jia Hongtao-B38951 Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472 On 08/05/2012 10:07 PM, Jia Hongtao-B38951 wrote: > > >> -----Original Message----- >> From: Wood Scott-B07421 >> Sent: Saturday, August 04, 2012 12:28 AM >> To: Jia Hongtao-B38951 >> Cc: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org; Li Yang- >> R58472; Wood Scott-B07421 >> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie >> initialization code >> >> On 08/03/2012 05:14 AM, Jia Hongtao wrote: >>> -void __devinit fsl_pci_init(void) >>> +/* Checkout if PCI contains ISA node */ >>> +static int of_pci_has_isa(struct device_node *pci_node) >>> +{ >>> + struct device_node *np; >>> + int ret = 0; >>> + >>> + if (!pci_node) >>> + return 0; >>> + >>> + read_lock(&devtree_lock); >>> + np = pci_node->allnext; >>> + >>> + /* Only scan the children of PCI node */ >>> + for (; np != pci_node->sibling; np = np->allnext) { >>> + if (np->type && (of_node_cmp(np->type, "isa") == 0) >>> + && of_node_get(np)) { >>> + ret = 1; >>> + break; >>> + } >>> + } >>> + >>> + of_node_put(pci_node); >>> + read_unlock(&devtree_lock); >>> + >>> + return ret; >>> +} >> >> Why do you keep insisting on substituting your ISA search code here? >> What advantages does it have over the code that is already there? It >> unnecessarily digs into the internals of the tree representation. >> > > I want ISA search is done from probe. Too bad. You're breaking the case where there's no ISA node. > Also this way is more efficient due > to we just search the children of PCI. It is not more efficient, because you're doing the search for every PCIe bus rather than once. Not that it matters in this context. >>> + >>> +static int __devinit fsl_pci_probe(struct platform_device *pdev) >>> { >>> int ret; >>> - struct device_node *node; >>> struct pci_controller *hose; >>> - dma_addr_t max = 0xffffffff; >>> + int is_primary = 0; >>> >>> - /* Callers can specify the primary bus using other means. */ >>> if (!fsl_pci_primary) { >>> - /* If a PCI host bridge contains an ISA node, it's primary. >> */ >>> - node = of_find_node_by_type(NULL, "isa"); >>> - while ((fsl_pci_primary = of_get_parent(node))) { >>> - of_node_put(node); >>> - node = fsl_pci_primary; >>> - >>> - if (of_match_node(pci_ids, node)) >>> - break; >>> - } >>> + is_primary = of_pci_has_isa(pdev->dev.of_node); >>> + if (is_primary) >>> + fsl_pci_primary = pdev->dev.of_node; >>> } >> >> As I explained before, this has to be done globally, not from the probe >> function, so we can assign a default primary bus if there isn't any ISA. >> There are bugs in the Linux PPC PCI code relating to not having any >> primary bus. >> >> -Scott > > In my way of searching ISA you can also assign a default primary bus in board > specific files. That was meant for when the board file had an alternate way of searching for the primary bus (e.g. look for i8259), not as a replacement for the mechanism that guarantees there's a primary bus. You are causing a regression in the qemu_e500.c platform. > I read your code and found that if there is no ISA node you will assign the > first PCI bus scanned as primary. It's not all right. Take ge_imp3a as an > example: The second PCI bus (9000) is primary not the first one. Does that board have ISA on it, that isn't described by the device tree? If so, before converting to the new init mechanism, the board code will need to set fsl_pci_primary based on its own knowledge of where that ISA is. If it doesn't have ISA, it doesn't matter which one we designate as primary. > I doubt that there are bugs if no primary assigned. Yeah, I just implemented the fallback for fun. Come on. It was recently discussed on this list. PCI under QEMU did not work without it. > Like mpc85xx_rdb assigned > no primary at all. Some other boards has no primary ether like p1022ds, p1021mds, > p1010rdb, p1023rds, all corenet boards (p2041_rdb, p3041_ds, p4080_ds, p5020_ds, > p5040_ds). If no primary is a bug then all these boards above are not correctly > setting up. Those boards are not being correctly set up. On real hardware things work by chance, but not under QEMU. -Scott ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code 2012-08-06 15:09 ` Scott Wood @ 2012-08-07 4:20 ` Li Yang 2012-08-07 15:24 ` Scott Wood 2012-08-07 8:09 ` Jia Hongtao-B38951 1 sibling, 1 reply; 28+ messages in thread From: Li Yang @ 2012-08-07 4:20 UTC (permalink / raw) To: Scott Wood Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472, Jia Hongtao-B38951 On Mon, Aug 6, 2012 at 11:09 PM, Scott Wood <scottwood@freescale.com> wrote: > On 08/05/2012 10:07 PM, Jia Hongtao-B38951 wrote: >> >> >>> -----Original Message----- >>> From: Wood Scott-B07421 >>> Sent: Saturday, August 04, 2012 12:28 AM >>> To: Jia Hongtao-B38951 >>> Cc: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org; Li Yang- >>> R58472; Wood Scott-B07421 >>> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie >>> initialization code >>> >>> On 08/03/2012 05:14 AM, Jia Hongtao wrote: >>>> -void __devinit fsl_pci_init(void) >>>> +/* Checkout if PCI contains ISA node */ >>>> +static int of_pci_has_isa(struct device_node *pci_node) >>>> +{ >>>> + struct device_node *np; >>>> + int ret = 0; >>>> + >>>> + if (!pci_node) >>>> + return 0; >>>> + >>>> + read_lock(&devtree_lock); >>>> + np = pci_node->allnext; >>>> + >>>> + /* Only scan the children of PCI node */ >>>> + for (; np != pci_node->sibling; np = np->allnext) { >>>> + if (np->type && (of_node_cmp(np->type, "isa") == 0) >>>> + && of_node_get(np)) { >>>> + ret = 1; >>>> + break; >>>> + } >>>> + } >>>> + >>>> + of_node_put(pci_node); >>>> + read_unlock(&devtree_lock); >>>> + >>>> + return ret; >>>> +} >>> >>> Why do you keep insisting on substituting your ISA search code here? >>> What advantages does it have over the code that is already there? It >>> unnecessarily digs into the internals of the tree representation. >>> >> >> I want ISA search is done from probe. > > Too bad. You're breaking the case where there's no ISA node. > We can also take care of special cases with our approach if needed. But it's not correct to assume the first PCI controller is the primary one if there is no ISA node. Your approach is still a band-aid to me. We can come back to this issue when we do find a proper solution. >> Also this way is more efficient due >> to we just search the children of PCI. > > It is not more efficient, because you're doing the search for every PCIe > bus rather than once. Not that it matters in this context. We end up scanning at most a few PCI nodes instead of the whole device tree for the primary. > >>>> + >>>> +static int __devinit fsl_pci_probe(struct platform_device *pdev) >>>> { >>>> int ret; >>>> - struct device_node *node; >>>> struct pci_controller *hose; >>>> - dma_addr_t max = 0xffffffff; >>>> + int is_primary = 0; >>>> >>>> - /* Callers can specify the primary bus using other means. */ >>>> if (!fsl_pci_primary) { >>>> - /* If a PCI host bridge contains an ISA node, it's primary. >>> */ >>>> - node = of_find_node_by_type(NULL, "isa"); >>>> - while ((fsl_pci_primary = of_get_parent(node))) { >>>> - of_node_put(node); >>>> - node = fsl_pci_primary; >>>> - >>>> - if (of_match_node(pci_ids, node)) >>>> - break; >>>> - } >>>> + is_primary = of_pci_has_isa(pdev->dev.of_node); >>>> + if (is_primary) >>>> + fsl_pci_primary = pdev->dev.of_node; >>>> } >>> >>> As I explained before, this has to be done globally, not from the probe >>> function, so we can assign a default primary bus if there isn't any ISA. >>> There are bugs in the Linux PPC PCI code relating to not having any >>> primary bus. >>> >>> -Scott >> >> In my way of searching ISA you can also assign a default primary bus in board >> specific files. > > That was meant for when the board file had an alternate way of searching > for the primary bus (e.g. look for i8259), not as a replacement for the > mechanism that guarantees there's a primary bus. > > You are causing a regression in the qemu_e500.c platform. Can we fix the qemu device tree to address the problem if we do make it a rule to use the ISA node to indicate the primary bus? - Leo ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code 2012-08-07 4:20 ` Li Yang @ 2012-08-07 15:24 ` Scott Wood 2012-08-08 9:03 ` Jia Hongtao-B38951 0 siblings, 1 reply; 28+ messages in thread From: Scott Wood @ 2012-08-07 15:24 UTC (permalink / raw) To: Li Yang Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472, Jia Hongtao-B38951 On 08/06/2012 11:20 PM, Li Yang wrote: > On Mon, Aug 6, 2012 at 11:09 PM, Scott Wood <scottwood@freescale.com> wrote: >> On 08/05/2012 10:07 PM, Jia Hongtao-B38951 wrote: >>> >>> >>>> -----Original Message----- >>>> From: Wood Scott-B07421 >>>> Sent: Saturday, August 04, 2012 12:28 AM >>>> To: Jia Hongtao-B38951 >>>> Cc: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org; Li Yang- >>>> R58472; Wood Scott-B07421 >>>> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie >>>> initialization code >>>> >>>> As I explained before, this has to be done globally, not from the probe >>>> function, so we can assign a default primary bus if there isn't any ISA. >>>> There are bugs in the Linux PPC PCI code relating to not having any >>>> primary bus. >>>> >>>> -Scott >>> >>> In my way of searching ISA you can also assign a default primary bus in board >>> specific files. >> >> That was meant for when the board file had an alternate way of searching >> for the primary bus (e.g. look for i8259), not as a replacement for the >> mechanism that guarantees there's a primary bus. >> >> You are causing a regression in the qemu_e500.c platform. > > Can we fix the qemu device tree to address the problem if we do make > it a rule to use the ISA node to indicate the primary bus? No. There is no ISA, and we're not going to lie and say there is. I really don't understand what the problem is with leaving the primary detection code as global. Either fix the bugs so we don't need a primary, or accept some "impurity" in the workaround. -Scott ^ permalink raw reply [flat|nested] 28+ messages in thread
* RE: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code 2012-08-07 15:24 ` Scott Wood @ 2012-08-08 9:03 ` Jia Hongtao-B38951 2012-08-08 15:58 ` Scott Wood 0 siblings, 1 reply; 28+ messages in thread From: Jia Hongtao-B38951 @ 2012-08-08 9:03 UTC (permalink / raw) To: Wood Scott-B07421, Li Yang-R58472 Cc: linuxppc-dev@lists.ozlabs.org, Li Yang-R58472 DQoNCj4gLS0tLS1PcmlnaW5hbCBNZXNzYWdlLS0tLS0NCj4gRnJvbTogV29vZCBTY290dC1CMDc0 MjENCj4gU2VudDogVHVlc2RheSwgQXVndXN0IDA3LCAyMDEyIDExOjI1IFBNDQo+IFRvOiBMaSBZ YW5nLVI1ODQ3Mg0KPiBDYzogV29vZCBTY290dC1CMDc0MjE7IGxpbnV4cHBjLWRldkBsaXN0cy5v emxhYnMub3JnOyBMaSBZYW5nLVI1ODQ3MjsgSmlhDQo+IEhvbmd0YW8tQjM4OTUxDQo+IFN1Ympl Y3Q6IFJlOiBbUEFUQ0ggVjUgMy8zXSBwb3dlcnBjL2ZzbC1wY2k6IFVuaWZ5IHBjaS9wY2llDQo+ IGluaXRpYWxpemF0aW9uIGNvZGUNCj4gDQo+IE9uIDA4LzA2LzIwMTIgMTE6MjAgUE0sIExpIFlh bmcgd3JvdGU6DQo+ID4gT24gTW9uLCBBdWcgNiwgMjAxMiBhdCAxMTowOSBQTSwgU2NvdHQgV29v ZCA8c2NvdHR3b29kQGZyZWVzY2FsZS5jb20+DQo+IHdyb3RlOg0KPiA+PiBPbiAwOC8wNS8yMDEy IDEwOjA3IFBNLCBKaWEgSG9uZ3Rhby1CMzg5NTEgd3JvdGU6DQo+ID4+Pg0KPiA+Pj4NCj4gPj4+ PiAtLS0tLU9yaWdpbmFsIE1lc3NhZ2UtLS0tLQ0KPiA+Pj4+IEZyb206IFdvb2QgU2NvdHQtQjA3 NDIxDQo+ID4+Pj4gU2VudDogU2F0dXJkYXksIEF1Z3VzdCAwNCwgMjAxMiAxMjoyOCBBTQ0KPiA+ Pj4+IFRvOiBKaWEgSG9uZ3Rhby1CMzg5NTENCj4gPj4+PiBDYzogbGludXhwcGMtZGV2QGxpc3Rz Lm96bGFicy5vcmc7IGdhbGFrQGtlcm5lbC5jcmFzaGluZy5vcmc7IExpDQo+ID4+Pj4gWWFuZy0g UjU4NDcyOyBXb29kIFNjb3R0LUIwNzQyMQ0KPiA+Pj4+IFN1YmplY3Q6IFJlOiBbUEFUQ0ggVjUg My8zXSBwb3dlcnBjL2ZzbC1wY2k6IFVuaWZ5IHBjaS9wY2llDQo+ID4+Pj4gaW5pdGlhbGl6YXRp b24gY29kZQ0KPiA+Pj4+DQo+ID4+Pj4gQXMgSSBleHBsYWluZWQgYmVmb3JlLCB0aGlzIGhhcyB0 byBiZSBkb25lIGdsb2JhbGx5LCBub3QgZnJvbSB0aGUNCj4gPj4+PiBwcm9iZSBmdW5jdGlvbiwg c28gd2UgY2FuIGFzc2lnbiBhIGRlZmF1bHQgcHJpbWFyeSBidXMgaWYgdGhlcmUNCj4gaXNuJ3Qg YW55IElTQS4NCj4gPj4+PiAgVGhlcmUgYXJlIGJ1Z3MgaW4gdGhlIExpbnV4IFBQQyBQQ0kgY29k ZSByZWxhdGluZyB0byBub3QgaGF2aW5nDQo+ID4+Pj4gYW55IHByaW1hcnkgYnVzLg0KPiA+Pj4+ DQo+ID4+Pj4gLVNjb3R0DQo+ID4+Pg0KPiA+Pj4gSW4gbXkgd2F5IG9mIHNlYXJjaGluZyBJU0Eg eW91IGNhbiBhbHNvIGFzc2lnbiBhIGRlZmF1bHQgcHJpbWFyeSBidXMNCj4gPj4+IGluIGJvYXJk IHNwZWNpZmljIGZpbGVzLg0KPiA+Pg0KPiA+PiBUaGF0IHdhcyBtZWFudCBmb3Igd2hlbiB0aGUg Ym9hcmQgZmlsZSBoYWQgYW4gYWx0ZXJuYXRlIHdheSBvZg0KPiA+PiBzZWFyY2hpbmcgZm9yIHRo ZSBwcmltYXJ5IGJ1cyAoZS5nLiBsb29rIGZvciBpODI1OSksIG5vdCBhcyBhDQo+ID4+IHJlcGxh Y2VtZW50IGZvciB0aGUgbWVjaGFuaXNtIHRoYXQgZ3VhcmFudGVlcyB0aGVyZSdzIGEgcHJpbWFy eSBidXMuDQo+ID4+DQo+ID4+IFlvdSBhcmUgY2F1c2luZyBhIHJlZ3Jlc3Npb24gaW4gdGhlIHFl bXVfZTUwMC5jIHBsYXRmb3JtLg0KPiA+DQo+ID4gQ2FuIHdlIGZpeCB0aGUgcWVtdSBkZXZpY2Ug dHJlZSB0byBhZGRyZXNzIHRoZSBwcm9ibGVtIGlmIHdlIGRvIG1ha2UNCj4gPiBpdCBhIHJ1bGUg dG8gdXNlIHRoZSBJU0Egbm9kZSB0byBpbmRpY2F0ZSB0aGUgcHJpbWFyeSBidXM/DQo+IA0KPiBO by4gIFRoZXJlIGlzIG5vIElTQSwgYW5kIHdlJ3JlIG5vdCBnb2luZyB0byBsaWUgYW5kIHNheSB0 aGVyZSBpcy4NCg0KQnV0IHdlIGNhbiBhc3NpZ24gYSBkZWZhdWx0IHByaW1hcnkgZm9yIHFlbXUu DQoNCj4gDQo+IEkgcmVhbGx5IGRvbid0IHVuZGVyc3RhbmQgd2hhdCB0aGUgcHJvYmxlbSBpcyB3 aXRoIGxlYXZpbmcgdGhlIHByaW1hcnkNCj4gZGV0ZWN0aW9uIGNvZGUgYXMgZ2xvYmFsLiAgRWl0 aGVyIGZpeCB0aGUgYnVncyBzbyB3ZSBkb24ndCBuZWVkIGEgcHJpbWFyeSwNCj4gb3IgYWNjZXB0 IHNvbWUgImltcHVyaXR5IiBpbiB0aGUgd29ya2Fyb3VuZC4NCj4gDQo+IC1TY290dA0KDQpHbG9i YWwgZGV0ZWN0aW9uIGZvciBwcmltYXJ5IGlzIG9rIGJ1dCB3ZSB0aGluayBvdXIgd2F5IGlzIGRl ZXBlciB1bmlmaWVkLg0KDQpJcyB0aGVyZSBhbnkgcHJvYmxlbSB0byBmaXggdGhlIGJ1Z3M/DQpJ IHJlYWxseSBkb24ndCB1bmRlcnN0YW5kIHdoeSB3ZSBoYXZlIHRvIG5lZWQgYSBwcmltYXJ5IGJ1 cy4NCg0KLUhvbmd0YW8uDQoNCg0K ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code 2012-08-08 9:03 ` Jia Hongtao-B38951 @ 2012-08-08 15:58 ` Scott Wood 2012-08-08 19:04 ` Gala Kumar-B11780 2012-08-09 3:48 ` Jia Hongtao-B38951 0 siblings, 2 replies; 28+ messages in thread From: Scott Wood @ 2012-08-08 15:58 UTC (permalink / raw) To: Jia Hongtao-B38951 Cc: Wood Scott-B07421, Kumar Gala, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472 On 08/08/2012 04:03 AM, Jia Hongtao-B38951 wrote: > > >> -----Original Message----- >> From: Wood Scott-B07421 >> Sent: Tuesday, August 07, 2012 11:25 PM >> To: Li Yang-R58472 >> Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org; Li Yang-R58472; Jia >> Hongtao-B38951 >> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie >> initialization code >> >> On 08/06/2012 11:20 PM, Li Yang wrote: >>> On Mon, Aug 6, 2012 at 11:09 PM, Scott Wood <scottwood@freescale.com> >> wrote: >>>> On 08/05/2012 10:07 PM, Jia Hongtao-B38951 wrote: >>>>> >>>>> >>>>>> -----Original Message----- >>>>>> From: Wood Scott-B07421 >>>>>> Sent: Saturday, August 04, 2012 12:28 AM >>>>>> To: Jia Hongtao-B38951 >>>>>> Cc: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org; Li >>>>>> Yang- R58472; Wood Scott-B07421 >>>>>> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie >>>>>> initialization code >>>>>> >>>>>> As I explained before, this has to be done globally, not from the >>>>>> probe function, so we can assign a default primary bus if there >> isn't any ISA. >>>>>> There are bugs in the Linux PPC PCI code relating to not having >>>>>> any primary bus. >>>>>> >>>>>> -Scott >>>>> >>>>> In my way of searching ISA you can also assign a default primary bus >>>>> in board specific files. >>>> >>>> That was meant for when the board file had an alternate way of >>>> searching for the primary bus (e.g. look for i8259), not as a >>>> replacement for the mechanism that guarantees there's a primary bus. >>>> >>>> You are causing a regression in the qemu_e500.c platform. >>> >>> Can we fix the qemu device tree to address the problem if we do make >>> it a rule to use the ISA node to indicate the primary bus? >> >> No. There is no ISA, and we're not going to lie and say there is. > > But we can assign a default primary for qemu. Not in the device tree. What other mechanism do you propose? And why do you want to fix it only for QEMU and not other boards, where things happen to work but not as designed? Kumar, can you speak up here as maintainer so we can stop going back and forth endlessly? >> I really don't understand what the problem is with leaving the primary >> detection code as global. Either fix the bugs so we don't need a primary, >> or accept some "impurity" in the workaround. >> >> -Scott > > Global detection for primary is ok but we think our way is deeper unified. So my way works and "is ok", and your way doesn't work but is theoretically cleaner. > Is there any problem to fix the bugs? If you want to fix them, go ahead. You don't get to rely on the bugs beign fixed until after they're actually fixed. > I really don't understand why we have to need a primary bus. Did you read Ben's e-mail that I posted a link to? -Scott ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code 2012-08-08 15:58 ` Scott Wood @ 2012-08-08 19:04 ` Gala Kumar-B11780 2012-08-10 8:47 ` Jia Hongtao-B38951 2012-08-09 3:48 ` Jia Hongtao-B38951 1 sibling, 1 reply; 28+ messages in thread From: Gala Kumar-B11780 @ 2012-08-08 19:04 UTC (permalink / raw) To: Wood Scott-B07421 Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472, Jia Hongtao-B38951 >>>>>>> As I explained before, this has to be done globally, not from the >>>>>>> probe function, so we can assign a default primary bus if there >>> isn't any ISA. >>>>>>> There are bugs in the Linux PPC PCI code relating to not having >>>>>>> any primary bus. >>>>>>>=20 >>>>>>> -Scott >>>>>>=20 >>>>>> In my way of searching ISA you can also assign a default primary bus >>>>>> in board specific files. >>>>>=20 >>>>> That was meant for when the board file had an alternate way of >>>>> searching for the primary bus (e.g. look for i8259), not as a >>>>> replacement for the mechanism that guarantees there's a primary bus. >>>>>=20 >>>>> You are causing a regression in the qemu_e500.c platform. >>>>=20 >>>> Can we fix the qemu device tree to address the problem if we do make >>>> it a rule to use the ISA node to indicate the primary bus? >>>=20 >>> No. There is no ISA, and we're not going to lie and say there is. >>=20 >> But we can assign a default primary for qemu. >=20 > Not in the device tree. What other mechanism do you propose? And why > do you want to fix it only for QEMU and not other boards, where things > happen to work but not as designed? >=20 > Kumar, can you speak up here as maintainer so we can stop going back and > forth endlessly? I'd rather we stick with the code that works for this purpose at this point= . That would be Scott's current upstream code. Lets get the other aspects= of this patchset closed (SWIOTLB, conversion to platform driver, PM, etc.)= . The primary bus code Scott wrote does NOT need to change at this point. - k= ^ permalink raw reply [flat|nested] 28+ messages in thread
* RE: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code 2012-08-08 19:04 ` Gala Kumar-B11780 @ 2012-08-10 8:47 ` Jia Hongtao-B38951 2012-08-10 16:00 ` Scott Wood 0 siblings, 1 reply; 28+ messages in thread From: Jia Hongtao-B38951 @ 2012-08-10 8:47 UTC (permalink / raw) To: Gala Kumar-B11780, Wood Scott-B07421 Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472 > -----Original Message----- > From: Gala Kumar-B11780 > Sent: Thursday, August 09, 2012 3:04 AM > To: Wood Scott-B07421 > Cc: Jia Hongtao-B38951; Wood Scott-B07421; Li Yang-R58472; linuxppc- > dev@lists.ozlabs.org > Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie > initialization code >=20 > >>>>>>> As I explained before, this has to be done globally, not from > >>>>>>> the probe function, so we can assign a default primary bus if > >>>>>>> there > >>> isn't any ISA. > >>>>>>> There are bugs in the Linux PPC PCI code relating to not having > >>>>>>> any primary bus. > >>>>>>> > >>>>>>> -Scott > >>>>>> > >>>>>> In my way of searching ISA you can also assign a default primary > >>>>>> bus in board specific files. > >>>>> > >>>>> That was meant for when the board file had an alternate way of > >>>>> searching for the primary bus (e.g. look for i8259), not as a > >>>>> replacement for the mechanism that guarantees there's a primary bus= . > >>>>> > >>>>> You are causing a regression in the qemu_e500.c platform. > >>>> > >>>> Can we fix the qemu device tree to address the problem if we do > >>>> make it a rule to use the ISA node to indicate the primary bus? > >>> > >>> No. There is no ISA, and we're not going to lie and say there is. > >> > >> But we can assign a default primary for qemu. > > > > Not in the device tree. What other mechanism do you propose? And why > > do you want to fix it only for QEMU and not other boards, where things > > happen to work but not as designed? > > > > Kumar, can you speak up here as maintainer so we can stop going back > > and forth endlessly? >=20 > I'd rather we stick with the code that works for this purpose at this > point. That would be Scott's current upstream code. Lets get the other > aspects of this patchset closed (SWIOTLB, conversion to platform driver, > PM, etc.). The primary bus code Scott wrote does NOT need to change at > this point. >=20 > - k I just submitted a new version of PCI patch in which I improve the primary = part. The reasons I want to change the way of primary assignment listed below: 1. This approach is functionally equivalent to the Scott's code. In my appr= oach there might be no primary assigned but it fixed by "quick fix" introduced b= y Ben. Please refer to this link: https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-June/098586.html 2. Scott's and my way could not handle the situation that "the primary is n= ot the first PCI bus detected". I found that only ge_imp3a got this problem so I f= ixed it by adding ISA node to its device tree. By adding this I think the solution = is logically completed. 3. The key advantage of my way is better unified for platform driver. If I = use the Scott's way I have to make an routine and called in all boards code. Th= e goal of my PCI patch is unifying all PCI initialization code and obviously prima= ry determination is part of PCI code. 4. The other advantage is efficiency. All my search for ISA node is just un= der PCI node instead of all device tree. - Hongtao. ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code 2012-08-10 8:47 ` Jia Hongtao-B38951 @ 2012-08-10 16:00 ` Scott Wood 2012-08-15 9:22 ` Jia Hongtao-B38951 0 siblings, 1 reply; 28+ messages in thread From: Scott Wood @ 2012-08-10 16:00 UTC (permalink / raw) To: Jia Hongtao-B38951 Cc: Wood Scott-B07421, Gala Kumar-B11780, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472 On 08/10/2012 03:47 AM, Jia Hongtao-B38951 wrote: > > >> -----Original Message----- >> From: Gala Kumar-B11780 >> Sent: Thursday, August 09, 2012 3:04 AM >> To: Wood Scott-B07421 >> Cc: Jia Hongtao-B38951; Wood Scott-B07421; Li Yang-R58472; linuxppc- >> dev@lists.ozlabs.org >> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie >> initialization code >> >>>>>>>>> As I explained before, this has to be done globally, not from >>>>>>>>> the probe function, so we can assign a default primary bus if >>>>>>>>> there >>>>> isn't any ISA. >>>>>>>>> There are bugs in the Linux PPC PCI code relating to not having >>>>>>>>> any primary bus. >>>>>>>>> >>>>>>>>> -Scott >>>>>>>> >>>>>>>> In my way of searching ISA you can also assign a default primary >>>>>>>> bus in board specific files. >>>>>>> >>>>>>> That was meant for when the board file had an alternate way of >>>>>>> searching for the primary bus (e.g. look for i8259), not as a >>>>>>> replacement for the mechanism that guarantees there's a primary bus. >>>>>>> >>>>>>> You are causing a regression in the qemu_e500.c platform. >>>>>> >>>>>> Can we fix the qemu device tree to address the problem if we do >>>>>> make it a rule to use the ISA node to indicate the primary bus? >>>>> >>>>> No. There is no ISA, and we're not going to lie and say there is. >>>> >>>> But we can assign a default primary for qemu. >>> >>> Not in the device tree. What other mechanism do you propose? And why >>> do you want to fix it only for QEMU and not other boards, where things >>> happen to work but not as designed? >>> >>> Kumar, can you speak up here as maintainer so we can stop going back >>> and forth endlessly? >> >> I'd rather we stick with the code that works for this purpose at this >> point. That would be Scott's current upstream code. Lets get the other >> aspects of this patchset closed (SWIOTLB, conversion to platform driver, >> PM, etc.). The primary bus code Scott wrote does NOT need to change at >> this point. >> >> - k > > > I just submitted a new version of PCI patch in which I improve the primary part. > The reasons I want to change the way of primary assignment listed below: > > 1. This approach is functionally equivalent to the Scott's code. In my approach > there might be no primary assigned but it fixed by "quick fix" introduced by Ben. > Please refer to this link: > https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-June/098586.html You might want to get Ben's input as to whether he actually wants to see that "quick fix" applied. > 2. Scott's and my way could not handle the situation that "the primary is not the > first PCI bus detected". I found that only ge_imp3a got this problem so I fixed it > by adding ISA node to its device tree. By adding this I think the solution is > logically completed. How did my approach not handle this case? As I said, ge_imp3a platform code needs to set fsl_pci_primary manually before PCI init runs. Adding a node to the device tree is not the answer, since that will break compatibility with old device trees. > 3. The key advantage of my way is better unified for platform driver. If I use > the Scott's way I have to make an routine and called in all boards code. Only until all boards are converted, and this is *not* different with your approach. > The goal > of my PCI patch is unifying all PCI initialization code and obviously primary > determination is part of PCI code. > > 4. The other advantage is efficiency. All my search for ISA node is just under > PCI node instead of all device tree. We do so many searches over the full device tree during boot that this is meaningless. Do you have benchmarks to show that device tree iteration is a significant contributor to boot time? -Scott ^ permalink raw reply [flat|nested] 28+ messages in thread
* RE: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code 2012-08-10 16:00 ` Scott Wood @ 2012-08-15 9:22 ` Jia Hongtao-B38951 2012-08-15 17:45 ` Scott Wood 0 siblings, 1 reply; 28+ messages in thread From: Jia Hongtao-B38951 @ 2012-08-15 9:22 UTC (permalink / raw) To: Wood Scott-B07421 Cc: Gala Kumar-B11780, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472 DQoNCj4gLS0tLS1PcmlnaW5hbCBNZXNzYWdlLS0tLS0NCj4gRnJvbTogV29vZCBTY290dC1CMDc0 MjENCj4gU2VudDogU2F0dXJkYXksIEF1Z3VzdCAxMSwgMjAxMiAxMjowMCBBTQ0KPiBUbzogSmlh IEhvbmd0YW8tQjM4OTUxDQo+IENjOiBHYWxhIEt1bWFyLUIxMTc4MDsgV29vZCBTY290dC1CMDc0 MjE7IExpIFlhbmctUjU4NDcyOyBsaW51eHBwYy0NCj4gZGV2QGxpc3RzLm96bGFicy5vcmcNCj4g U3ViamVjdDogUmU6IFtQQVRDSCBWNSAzLzNdIHBvd2VycGMvZnNsLXBjaTogVW5pZnkgcGNpL3Bj aWUNCj4gaW5pdGlhbGl6YXRpb24gY29kZQ0KPiANCj4gT24gMDgvMTAvMjAxMiAwMzo0NyBBTSwg SmlhIEhvbmd0YW8tQjM4OTUxIHdyb3RlOg0KPiA+DQo+ID4NCj4gPj4gLS0tLS1PcmlnaW5hbCBN ZXNzYWdlLS0tLS0NCj4gPj4gRnJvbTogR2FsYSBLdW1hci1CMTE3ODANCj4gPj4gU2VudDogVGh1 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* Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code 2012-08-15 9:22 ` Jia Hongtao-B38951 @ 2012-08-15 17:45 ` Scott Wood 0 siblings, 0 replies; 28+ messages in thread From: Scott Wood @ 2012-08-15 17:45 UTC (permalink / raw) To: Jia Hongtao-B38951 Cc: Wood Scott-B07421, Gala Kumar-B11780, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472 On 08/15/2012 04:22 AM, Jia Hongtao-B38951 wrote: > > >> -----Original Message----- >> From: Wood Scott-B07421 >> Sent: Saturday, August 11, 2012 12:00 AM >> To: Jia Hongtao-B38951 >> Cc: Gala Kumar-B11780; Wood Scott-B07421; Li Yang-R58472; linuxppc- >> dev@lists.ozlabs.org >> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie >> initialization code >> >> On 08/10/2012 03:47 AM, Jia Hongtao-B38951 wrote: >>> >>> >>>> -----Original Message----- >>>> From: Gala Kumar-B11780 >>>> Sent: Thursday, August 09, 2012 3:04 AM >>>> To: Wood Scott-B07421 >>>> Cc: Jia Hongtao-B38951; Wood Scott-B07421; Li Yang-R58472; linuxppc- >>>> dev@lists.ozlabs.org >>>> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie >>>> initialization code >>>> >>>>>>>>>>> As I explained before, this has to be done globally, not from >>>>>>>>>>> the probe function, so we can assign a default primary bus if >>>>>>>>>>> there >>>>>>> isn't any ISA. >>>>>>>>>>> There are bugs in the Linux PPC PCI code relating to not >>>>>>>>>>> having any primary bus. >>>>>>>>>>> >>>>>>>>>>> -Scott >>>>>>>>>> >>>>>>>>>> In my way of searching ISA you can also assign a default >>>>>>>>>> primary bus in board specific files. >>>>>>>>> >>>>>>>>> That was meant for when the board file had an alternate way of >>>>>>>>> searching for the primary bus (e.g. look for i8259), not as a >>>>>>>>> replacement for the mechanism that guarantees there's a primary >> bus. >>>>>>>>> >>>>>>>>> You are causing a regression in the qemu_e500.c platform. >>>>>>>> >>>>>>>> Can we fix the qemu device tree to address the problem if we do >>>>>>>> make it a rule to use the ISA node to indicate the primary bus? >>>>>>> >>>>>>> No. There is no ISA, and we're not going to lie and say there is. >>>>>> >>>>>> But we can assign a default primary for qemu. >>>>> >>>>> Not in the device tree. What other mechanism do you propose? And >>>>> why do you want to fix it only for QEMU and not other boards, where >>>>> things happen to work but not as designed? >>>>> >>>>> Kumar, can you speak up here as maintainer so we can stop going back >>>>> and forth endlessly? >>>> >>>> I'd rather we stick with the code that works for this purpose at this >>>> point. That would be Scott's current upstream code. Lets get the >>>> other aspects of this patchset closed (SWIOTLB, conversion to >>>> platform driver, PM, etc.). The primary bus code Scott wrote does >>>> NOT need to change at this point. >>>> >>>> - k >>> >>> >>> I just submitted a new version of PCI patch in which I improve the >> primary part. >>> The reasons I want to change the way of primary assignment listed below: >>> >>> 1. This approach is functionally equivalent to the Scott's code. In my >>> approach there might be no primary assigned but it fixed by "quick fix" >> introduced by Ben. >>> Please refer to this link: >>> https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-June/098586.html >> >> You might want to get Ben's input as to whether he actually wants to see >> that "quick fix" applied. >> >>> 2. Scott's and my way could not handle the situation that "the primary >>> is not the first PCI bus detected". I found that only ge_imp3a got >>> this problem so I fixed it by adding ISA node to its device tree. By >>> adding this I think the solution is logically completed. >> >> How did my approach not handle this case? As I said, ge_imp3a platform >> code needs to set fsl_pci_primary manually before PCI init runs. >> >> Adding a node to the device tree is not the answer, since that will break >> compatibility with old device trees. >> > > I assume that kernel image and dtb image are from the same tree. That's a bad assumption. Device trees get forked off for custom boards, modified by firmware, generated by firmware, etc. -Scott ^ permalink raw reply [flat|nested] 28+ messages in thread
* RE: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code 2012-08-08 15:58 ` Scott Wood 2012-08-08 19:04 ` Gala Kumar-B11780 @ 2012-08-09 3:48 ` Jia Hongtao-B38951 2012-08-09 17:00 ` Scott Wood 1 sibling, 1 reply; 28+ messages in thread From: Jia Hongtao-B38951 @ 2012-08-09 3:48 UTC (permalink / raw) To: Wood Scott-B07421 Cc: Gala Kumar-B11780, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472 DQoNCj4gLS0tLS1PcmlnaW5hbCBNZXNzYWdlLS0tLS0NCj4gRnJvbTogV29vZCBTY290dC1CMDc0 MjENCj4gU2VudDogV2VkbmVzZGF5LCBBdWd1c3QgMDgsIDIwMTIgMTE6NTggUE0NCj4gVG86IEpp YSBIb25ndGFvLUIzODk1MQ0KPiBDYzogV29vZCBTY290dC1CMDc0MjE7IExpIFlhbmctUjU4NDcy OyBsaW51eHBwYy1kZXZAbGlzdHMub3psYWJzLm9yZzsNCj4gR2FsYSBLdW1hci1CMTE3ODANCj4g U3ViamVjdDogUmU6IFtQQVRDSCBWNSAzLzNdIHBvd2VycGMvZnNsLXBjaTogVW5pZnkgcGNpL3Bj aWUNCj4gaW5pdGlhbGl6YXRpb24gY29kZQ0KPiANCj4gT24gMDgvMDgvMjAxMiAwNDowMyBBTSwg SmlhIEhvbmd0YW8tQjM4OTUxIHdyb3RlOg0KPiA+DQo+ID4NCj4gPj4gLS0tLS1PcmlnaW5hbCBN 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* Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code 2012-08-09 3:48 ` Jia Hongtao-B38951 @ 2012-08-09 17:00 ` Scott Wood 0 siblings, 0 replies; 28+ messages in thread From: Scott Wood @ 2012-08-09 17:00 UTC (permalink / raw) To: Jia Hongtao-B38951 Cc: Wood Scott-B07421, Gala Kumar-B11780, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472 On 08/08/2012 10:48 PM, Jia Hongtao-B38951 wrote: > > >> -----Original Message----- >> From: Wood Scott-B07421 >> Sent: Wednesday, August 08, 2012 11:58 PM >> To: Jia Hongtao-B38951 >> Cc: Wood Scott-B07421; Li Yang-R58472; linuxppc-dev@lists.ozlabs.org; >> Gala Kumar-B11780 >> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie >> initialization code >> >> On 08/08/2012 04:03 AM, Jia Hongtao-B38951 wrote: >>> >>> >>>> -----Original Message----- >>>> From: Wood Scott-B07421 >>>> Sent: Tuesday, August 07, 2012 11:25 PM >>>> To: Li Yang-R58472 >>>> Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org; Li Yang-R58472; >>>> Jia >>>> Hongtao-B38951 >>>> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie >>>> initialization code >>>> >>>> On 08/06/2012 11:20 PM, Li Yang wrote: >>>>> On Mon, Aug 6, 2012 at 11:09 PM, Scott Wood >>>>> <scottwood@freescale.com> >>>> wrote: >>>>>> On 08/05/2012 10:07 PM, Jia Hongtao-B38951 wrote: >>>>>>> >>>>>>> >>>>>>>> -----Original Message----- >>>>>>>> From: Wood Scott-B07421 >>>>>>>> Sent: Saturday, August 04, 2012 12:28 AM >>>>>>>> To: Jia Hongtao-B38951 >>>>>>>> Cc: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org; Li >>>>>>>> Yang- R58472; Wood Scott-B07421 >>>>>>>> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie >>>>>>>> initialization code >>>>>>>> >>>>>>>> As I explained before, this has to be done globally, not from the >>>>>>>> probe function, so we can assign a default primary bus if there >>>> isn't any ISA. >>>>>>>> There are bugs in the Linux PPC PCI code relating to not having >>>>>>>> any primary bus. >>>>>>>> >>>>>>>> -Scott >>>>>>> >>>>>>> In my way of searching ISA you can also assign a default primary >>>>>>> bus in board specific files. >>>>>> >>>>>> That was meant for when the board file had an alternate way of >>>>>> searching for the primary bus (e.g. look for i8259), not as a >>>>>> replacement for the mechanism that guarantees there's a primary bus. >>>>>> >>>>>> You are causing a regression in the qemu_e500.c platform. >>>>> >>>>> Can we fix the qemu device tree to address the problem if we do make >>>>> it a rule to use the ISA node to indicate the primary bus? >>>> >>>> No. There is no ISA, and we're not going to lie and say there is. >>> >>> But we can assign a default primary for qemu. >> >> Not in the device tree. What other mechanism do you propose? And why do >> you want to fix it only for QEMU and not other boards, where things >> happen to work but not as designed? >> >> Kumar, can you speak up here as maintainer so we can stop going back and >> forth endlessly? >> >>>> I really don't understand what the problem is with leaving the >>>> primary detection code as global. Either fix the bugs so we don't >>>> need a primary, or accept some "impurity" in the workaround. >>>> >>>> -Scott >>> >>> Global detection for primary is ok but we think our way is deeper >> unified. >> >> So my way works and "is ok", and your way doesn't work but is >> theoretically cleaner. > > Sorry, I meant global detection is ok but I didn't mean that your logic > is ok. The concern is in some cases there is no isa node in device tree > and the primary is not the first bus. Your logic assigned a wrong primary > there. Is that a problem? Take ge_imp3a as an example. > > So maybe we should fix this exceptional board. Boards like that are why the code first checks for whether fsl_pci_primary is NULL. Board code can set fsl_pci_primary based on other criteria before calling fsl_pci_init(). This is why we need to allow for a gradual conversion, so boards like that can get personal attention by someone who can test the change. -Scott ^ permalink raw reply [flat|nested] 28+ messages in thread
* RE: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code 2012-08-06 15:09 ` Scott Wood 2012-08-07 4:20 ` Li Yang @ 2012-08-07 8:09 ` Jia Hongtao-B38951 2012-08-07 15:28 ` Scott Wood 1 sibling, 1 reply; 28+ messages in thread From: Jia Hongtao-B38951 @ 2012-08-07 8:09 UTC (permalink / raw) To: Wood Scott-B07421; +Cc: linuxppc-dev@lists.ozlabs.org, Li Yang-R58472 DQoNCj4gLS0tLS1PcmlnaW5hbCBNZXNzYWdlLS0tLS0NCj4gRnJvbTogV29vZCBTY290dC1CMDc0 MjENCj4gU2VudDogTW9uZGF5LCBBdWd1c3QgMDYsIDIwMTIgMTE6MTAgUE0NCj4gVG86IEppYSBI b25ndGFvLUIzODk1MQ0KPiBDYzogV29vZCBTY290dC1CMDc0MjE7IGxpbnV4cHBjLWRldkBsaXN0 cy5vemxhYnMub3JnOw0KPiBnYWxha0BrZXJuZWwuY3Jhc2hpbmcub3JnOyBMaSBZYW5nLVI1ODQ3 Mg0KPiBTdWJqZWN0OiBSZTogW1BBVENIIFY1IDMvM10gcG93ZXJwYy9mc2wtcGNpOiBVbmlmeSBw Y2kvcGNpZQ0KPiBpbml0aWFsaXphdGlvbiBjb2RlDQo+IA0KPiBPbiAwOC8wNS8yMDEyIDEwOjA3 IFBNLCBKaWEgSG9uZ3Rhby1CMzg5NTEgd3JvdGU6DQo+ID4NCj4gPg0KPiA+PiAtLS0tLU9yaWdp bmFsIE1lc3NhZ2UtLS0tLQ0KPiA+PiBGcm9tOiBXb29kIFNjb3R0LUIwNzQyMQ0KPiA+PiBTZW50 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* Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code 2012-08-07 8:09 ` Jia Hongtao-B38951 @ 2012-08-07 15:28 ` Scott Wood 2012-08-08 9:39 ` Jia Hongtao-B38951 0 siblings, 1 reply; 28+ messages in thread From: Scott Wood @ 2012-08-07 15:28 UTC (permalink / raw) To: Jia Hongtao-B38951 Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472 On 08/07/2012 03:09 AM, Jia Hongtao-B38951 wrote: > I am really not sure that all boards need primary bus. Could you give me > the link of discussion about primary that you mentioned? https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-June/098586.html -Scott ^ permalink raw reply [flat|nested] 28+ messages in thread
* RE: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code 2012-08-07 15:28 ` Scott Wood @ 2012-08-08 9:39 ` Jia Hongtao-B38951 2012-08-08 16:02 ` Scott Wood 0 siblings, 1 reply; 28+ messages in thread From: Jia Hongtao-B38951 @ 2012-08-08 9:39 UTC (permalink / raw) To: Wood Scott-B07421; +Cc: linuxppc-dev@lists.ozlabs.org, Li Yang-R58472 DQoNCj4gLS0tLS1PcmlnaW5hbCBNZXNzYWdlLS0tLS0NCj4gRnJvbTogV29vZCBTY290dC1CMDc0 MjENCj4gU2VudDogVHVlc2RheSwgQXVndXN0IDA3LCAyMDEyIDExOjI5IFBNDQo+IFRvOiBKaWEg SG9uZ3Rhby1CMzg5NTENCj4gQ2M6IFdvb2QgU2NvdHQtQjA3NDIxOyBsaW51eHBwYy1kZXZAbGlz dHMub3psYWJzLm9yZzsNCj4gZ2FsYWtAa2VybmVsLmNyYXNoaW5nLm9yZzsgTGkgWWFuZy1SNTg0 NzINCj4gU3ViamVjdDogUmU6IFtQQVRDSCBWNSAzLzNdIHBvd2VycGMvZnNsLXBjaTogVW5pZnkg cGNpL3BjaWUNCj4gaW5pdGlhbGl6YXRpb24gY29kZQ0KPiANCj4gT24gMDgvMDcvMjAxMiAwMzow OSBBTSwgSmlhIEhvbmd0YW8tQjM4OTUxIHdyb3RlOg0KPiA+IEkgYW0gcmVhbGx5IG5vdCBzdXJl IHRoYXQgYWxsIGJvYXJkcyBuZWVkIHByaW1hcnkgYnVzLiBDb3VsZCB5b3UgZ2l2ZQ0KPiA+IG1l IHRoZSBsaW5rIG9mIGRpc2N1c3Npb24gYWJvdXQgcHJpbWFyeSB0aGF0IHlvdSBtZW50aW9uZWQ/ DQo+IA0KPiBodHRwczovL2xpc3RzLm96bGFicy5vcmcvcGlwZXJtYWlsL2xpbnV4cHBjLWRldi8y MDEyLUp1bmUvMDk4NTg2Lmh0bWwNCj4gDQo+IC1TY290dA0KDQoNCkl0IHNlZW1zIGluIHFlbXUg aXNhX2lvX2Jhc2UgbXVzdCBiZSBub24temVyby4NCklmIHRoZXJlIGlzIG5vIGlzYSBicmlkZ2Ug c2hvdWxkIGlzYV9pb19iYXNlIGJlIG5vbi16ZXJvIGZvciBvdGhlciBib2FyZHM/DQpJZiBub3Qg bWF5YmUgd2Ugc2hvdWxkIGZpeCBxZW11IGJ1Zy4NCk9yICJxdWljayBmaXgiIGluIHRoZSBsaW5r IGlzIGEgd29ya2Fyb3VuZC4NCg0KLUhvbmd0YW8uDQo= ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code 2012-08-08 9:39 ` Jia Hongtao-B38951 @ 2012-08-08 16:02 ` Scott Wood 2012-08-09 3:48 ` Jia Hongtao-B38951 0 siblings, 1 reply; 28+ messages in thread From: Scott Wood @ 2012-08-08 16:02 UTC (permalink / raw) To: Jia Hongtao-B38951 Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472 On 08/08/2012 04:39 AM, Jia Hongtao-B38951 wrote: > > >> -----Original Message----- >> From: Wood Scott-B07421 >> Sent: Tuesday, August 07, 2012 11:29 PM >> To: Jia Hongtao-B38951 >> Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org; >> galak@kernel.crashing.org; Li Yang-R58472 >> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie >> initialization code >> >> On 08/07/2012 03:09 AM, Jia Hongtao-B38951 wrote: >>> I am really not sure that all boards need primary bus. Could you give >>> me the link of discussion about primary that you mentioned? >> >> https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-June/098586.html >> >> -Scott > > > It seems in qemu isa_io_base must be non-zero. In all cases. It just shows up worse under QEMU because of a different issue. > If there is no isa bridge should isa_io_base be non-zero for other boards? Yes, until the bugs are fixed. > If not maybe we should fix qemu bug. If you want to try to make QEMU accept I/O BARs with address zero, go ahead, but you don't get to assume that someone else will do it, we still need to be compatible with older QEMUs (this bug is not so severe that compatibility is unreasonable), and it still doesn't address the fact that things are not functioning as designed. IIRC there are some real hardware PCI cards that don't like getting an address of zero either. > Or "quick fix" in the link is a workaround. I think that "quick fix" may have problems if there is a primary bus but it's not the first one detected. In any case, any fix or workaround has to happen before you make changes that rely on it. -Scott ^ permalink raw reply [flat|nested] 28+ messages in thread
* RE: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code 2012-08-08 16:02 ` Scott Wood @ 2012-08-09 3:48 ` Jia Hongtao-B38951 2012-08-09 22:20 ` Scott Wood 0 siblings, 1 reply; 28+ messages in thread From: Jia Hongtao-B38951 @ 2012-08-09 3:48 UTC (permalink / raw) To: Wood Scott-B07421; +Cc: linuxppc-dev@lists.ozlabs.org, Li Yang-R58472 DQoNCj4gLS0tLS1PcmlnaW5hbCBNZXNzYWdlLS0tLS0NCj4gRnJvbTogV29vZCBTY290dC1CMDc0 MjENCj4gU2VudDogVGh1cnNkYXksIEF1Z3VzdCAwOSwgMjAxMiAxMjowMiBBTQ0KPiBUbzogSmlh IEhvbmd0YW8tQjM4OTUxDQo+IENjOiBXb29kIFNjb3R0LUIwNzQyMTsgbGludXhwcGMtZGV2QGxp c3RzLm96bGFicy5vcmc7DQo+IGdhbGFrQGtlcm5lbC5jcmFzaGluZy5vcmc7IExpIFlhbmctUjU4 NDcyDQo+IFN1YmplY3Q6IFJlOiBbUEFUQ0ggVjUgMy8zXSBwb3dlcnBjL2ZzbC1wY2k6IFVuaWZ5 IHBjaS9wY2llDQo+IGluaXRpYWxpemF0aW9uIGNvZGUNCj4gDQo+IE9uIDA4LzA4LzIwMTIgMDQ6 MzkgQU0sIEppYSBIb25ndGFvLUIzODk1MSB3cm90ZToNCj4gPg0KPiA+DQo+ID4+IC0tLS0tT3Jp Z2luYWwgTWVzc2FnZS0tLS0tDQo+ID4+IEZyb206IFdvb2QgU2NvdHQtQjA3NDIxDQo+ID4+IFNl bnQ6IFR1ZXNkYXksIEF1Z3VzdCAwNywgMjAxMiAxMToyOSBQTQ0KPiA+PiBUbzogSmlhIEhvbmd0 YW8tQjM4OTUxDQo+ID4+IENjOiBXb29kIFNjb3R0LUIwNzQyMTsgbGludXhwcGMtZGV2QGxpc3Rz Lm96bGFicy5vcmc7DQo+ID4+IGdhbGFrQGtlcm5lbC5jcmFzaGluZy5vcmc7IExpIFlhbmctUjU4 NDcyDQo+ID4+IFN1YmplY3Q6IFJlOiBbUEFUQ0ggVjUgMy8zXSBwb3dlcnBjL2ZzbC1wY2k6IFVu aWZ5IHBjaS9wY2llDQo+ID4+IGluaXRpYWxpemF0aW9uIGNvZGUNCj4gPj4NCj4gPj4gT24gMDgv MDcvMjAxMiAwMzowOSBBTSwgSmlhIEhvbmd0YW8tQjM4OTUxIHdyb3RlOg0KPiA+Pj4gSSBhbSBy ZWFsbHkgbm90IHN1cmUgdGhhdCBhbGwgYm9hcmRzIG5lZWQgcHJpbWFyeSBidXMuIENvdWxkIHlv dQ0KPiA+Pj4gZ2l2ZSBtZSB0aGUgbGluayBvZiBkaXNjdXNzaW9uIGFib3V0IHByaW1hcnkgdGhh dCB5b3UgbWVudGlvbmVkPw0KPiA+Pg0KPiA+PiBodHRwczovL2xpc3RzLm96bGFicy5vcmcvcGlw ZXJtYWlsL2xpbnV4cHBjLWRldi8yMDEyLUp1bmUvMDk4NTg2Lmh0bWwNCj4gPj4NCj4gPj4gLVNj b3R0DQo+ID4NCj4gPg0KPiA+IEl0IHNlZW1zIGluIHFlbXUgaXNhX2lvX2Jhc2UgbXVzdCBiZSBu b24temVyby4NCj4gDQo+IEluIGFsbCBjYXNlcy4gIEl0IGp1c3Qgc2hvd3MgdXAgd29yc2UgdW5k ZXIgUUVNVSBiZWNhdXNlIG9mIGEgZGlmZmVyZW50DQo+IGlzc3VlLg0KPiANCj4gPiBJZiB0aGVy ZSBpcyBubyBpc2EgYnJpZGdlIHNob3VsZCBpc2FfaW9fYmFzZSBiZSBub24temVybyBmb3Igb3Ro ZXINCj4gYm9hcmRzPw0KPiANCj4gWWVzLCB1bnRpbCB0aGUgYnVncyBhcmUgZml4ZWQuDQo+IA0K PiA+IElmIG5vdCBtYXliZSB3ZSBzaG91bGQgZml4IHFlbXUgYnVnLg0KPiANCj4gSWYgeW91IHdh bnQgdG8gdHJ5IHRvIG1ha2UgUUVNVSBhY2NlcHQgSS9PIEJBUnMgd2l0aCBhZGRyZXNzIHplcm8s IGdvDQo+IGFoZWFkLCBidXQgeW91IGRvbid0IGdldCB0byBhc3N1bWUgdGhhdCBzb21lb25lIGVs c2Ugd2lsbCBkbyBpdCwgd2Ugc3RpbGwNCj4gbmVlZCB0byBiZSBjb21wYXRpYmxlIHdpdGggb2xk ZXIgUUVNVXMgKHRoaXMgYnVnIGlzIG5vdCBzbyBzZXZlcmUgdGhhdA0KPiBjb21wYXRpYmlsaXR5 IGlzIHVucmVhc29uYWJsZSksIGFuZCBpdCBzdGlsbCBkb2Vzbid0IGFkZHJlc3MgdGhlIGZhY3QN Cj4gdGhhdCB0aGluZ3MgYXJlIG5vdCBmdW5jdGlvbmluZyBhcyBkZXNpZ25lZC4gIElJUkMgdGhl cmUgYXJlIHNvbWUgcmVhbA0KPiBoYXJkd2FyZSBQQ0kgY2FyZHMgdGhhdCBkb24ndCBsaWtlIGdl dHRpbmcgYW4gYWRkcmVzcyBvZiB6ZXJvIGVpdGhlci4NCj4gDQo+ID4gT3IgInF1aWNrIGZpeCIg aW4gdGhlIGxpbmsgaXMgYSB3b3JrYXJvdW5kLg0KPiANCj4gSSB0aGluayB0aGF0ICJxdWljayBm aXgiIG1heSBoYXZlIHByb2JsZW1zIGlmIHRoZXJlIGlzIGEgcHJpbWFyeSBidXMgYnV0DQo+IGl0 J3Mgbm90IHRoZSBmaXJzdCBvbmUgZGV0ZWN0ZWQuICBJbiBhbnkgY2FzZSwgYW55IGZpeCBvciB3 b3JrYXJvdW5kIGhhcw0KPiB0byBoYXBwZW4gYmVmb3JlIHlvdSBtYWtlIGNoYW5nZXMgdGhhdCBy ZWx5IG9uIGl0Lg0KPiANCj4gLVNjb3R0DQoNCklmIHRoZXJlIGlzIG5vIHByaW1hcnkgYXNzaWdu ZWQgYW5kIGFjY2lkZW50bHkgdGhlIHByaW1hcnkgaXMgbm90IHRoZQ0KZmlyc3Qgb25lIHRoaXMg InF1aWNrIGZpeCIgbWF5IGhhdmUgcHJvYmxlbS4gQnV0IHRoaXMgLWFjY2lkZW50LSBvbmx5IGhh cHBlbmVkDQppbiBnZV9pbXAzYSBib2FyZCBpZiBJIGRpZG4ndCBtaXNzIG90aGVyIGJvYXJkcy4g DQoNClNvIGlmIHRoZXJlIGlzIG5vIHByaW1hcnkgYXNzaWduZWQgYnV0IHRoZSBwcmltYXJ5IGlz IHRoZSBmaXJzdCBidXMgZGV0ZWN0ZWQNCnRoaXMgInF1aWNrIGZpeCIgaXMgcmlnaHQuIFRoYXQg bWVhbnMgdGhlICJxdWljayBmaXgiIGlzIHRoZSBlcXVpdmFsZW50DQpzdWJzdGl0dXRpb24gZm9y ICJhcmJpdHJhcmlseSBkZXNpZ25hdGUgb25lIGFzIHByaW1hcnkiLg0KDQpNYXliZSB3ZSBjYW4g dXNlIHRoZSAicXVpY2sgZml4IiBhbmQgZml4IGdlX2ltcDNhIGFzIGFuIGV4Y2VwdGlvbmFsIGNh c2UuDQoNCi1Ib25ndGFvLg0KDQoNCg== ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code 2012-08-09 3:48 ` Jia Hongtao-B38951 @ 2012-08-09 22:20 ` Scott Wood 0 siblings, 0 replies; 28+ messages in thread From: Scott Wood @ 2012-08-09 22:20 UTC (permalink / raw) To: Jia Hongtao-B38951 Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472 On 08/08/2012 10:48 PM, Jia Hongtao-B38951 wrote: > > >> -----Original Message----- >> From: Wood Scott-B07421 >> Sent: Thursday, August 09, 2012 12:02 AM >> To: Jia Hongtao-B38951 >> Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org; >> galak@kernel.crashing.org; Li Yang-R58472 >> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie >> initialization code >> >> On 08/08/2012 04:39 AM, Jia Hongtao-B38951 wrote: >>> >>> >>>> -----Original Message----- >>>> From: Wood Scott-B07421 >>>> Sent: Tuesday, August 07, 2012 11:29 PM >>>> To: Jia Hongtao-B38951 >>>> Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org; >>>> galak@kernel.crashing.org; Li Yang-R58472 >>>> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie >>>> initialization code >>>> >>>> On 08/07/2012 03:09 AM, Jia Hongtao-B38951 wrote: >>>>> I am really not sure that all boards need primary bus. Could you >>>>> give me the link of discussion about primary that you mentioned? >>>> >>>> https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-June/098586.html >>>> >>>> -Scott >>> >>> >>> It seems in qemu isa_io_base must be non-zero. >> >> In all cases. It just shows up worse under QEMU because of a different >> issue. >> >>> If there is no isa bridge should isa_io_base be non-zero for other >> boards? >> >> Yes, until the bugs are fixed. >> >>> If not maybe we should fix qemu bug. >> >> If you want to try to make QEMU accept I/O BARs with address zero, go >> ahead, but you don't get to assume that someone else will do it, we still >> need to be compatible with older QEMUs (this bug is not so severe that >> compatibility is unreasonable), and it still doesn't address the fact >> that things are not functioning as designed. IIRC there are some real >> hardware PCI cards that don't like getting an address of zero either. >> >>> Or "quick fix" in the link is a workaround. >> >> I think that "quick fix" may have problems if there is a primary bus but >> it's not the first one detected. In any case, any fix or workaround has >> to happen before you make changes that rely on it. >> >> -Scott > > If there is no primary assigned and accidently the primary is not the > first one this "quick fix" may have problem. But this -accident- only happened > in ge_imp3a board if I didn't miss other boards. How is it an accident? It's a perfectly legitimate situation. > So if there is no primary assigned but the primary is the first bus detected > this "quick fix" is right. That means the "quick fix" is the equivalent > substitution for "arbitrarily designate one as primary". It's not equivalent because I didn't try to convert the ge_imp3a board, and if I did I would have added special code to the ge_imp3a board to set the fsl_pci_primary before calling fsl_pci_init(). -Scott ^ permalink raw reply [flat|nested] 28+ messages in thread
end of thread, other threads:[~2012-08-15 17:46 UTC | newest] Thread overview: 28+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2012-08-03 10:14 [PATCH V5 0/3] PCI patch set description Jia Hongtao 2012-08-03 10:14 ` [PATCH V5 1/3] powerpc/fsl-pci: Only scan PCI bus if configured as a host Jia Hongtao 2012-08-03 13:57 ` Kumar Gala 2012-08-03 10:14 ` [PATCH V5 2/3] powerpc/swiotlb: Enable at early stage and disable if not necessary Jia Hongtao 2012-08-08 19:03 ` Kumar Gala 2012-08-09 5:57 ` Tony Breeds 2012-08-10 12:58 ` Kumar Gala 2012-08-03 10:14 ` [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code Jia Hongtao 2012-08-03 16:27 ` Scott Wood 2012-08-06 3:07 ` Jia Hongtao-B38951 2012-08-06 15:09 ` Scott Wood 2012-08-07 4:20 ` Li Yang 2012-08-07 15:24 ` Scott Wood 2012-08-08 9:03 ` Jia Hongtao-B38951 2012-08-08 15:58 ` Scott Wood 2012-08-08 19:04 ` Gala Kumar-B11780 2012-08-10 8:47 ` Jia Hongtao-B38951 2012-08-10 16:00 ` Scott Wood 2012-08-15 9:22 ` Jia Hongtao-B38951 2012-08-15 17:45 ` Scott Wood 2012-08-09 3:48 ` Jia Hongtao-B38951 2012-08-09 17:00 ` Scott Wood 2012-08-07 8:09 ` Jia Hongtao-B38951 2012-08-07 15:28 ` Scott Wood 2012-08-08 9:39 ` Jia Hongtao-B38951 2012-08-08 16:02 ` Scott Wood 2012-08-09 3:48 ` Jia Hongtao-B38951 2012-08-09 22:20 ` Scott Wood
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