[PATCH v2 1/2] powerpc/mpic: Add Open-PIC global timer document

[PATCH v2 1/2] powerpc/mpic: Add Open-PIC global timer document

[Dongsheng.wang]

From: Wang Dongsheng <Dongsheng.Wang@freescale.com>

Add a description of the OPEN-PIC global timer in the OPEN-PIC document.

Moidfy mpic-timer document. 1.Add a TFRR register region. This register
is written by software to report the clocking frequency of the PIC timers.
2.Add a device_type. The global timer in line with the OPEN-PIC specification.

Signed-off-by: Wang Dongsheng <Dongsheng.Wang@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
 Documentation/devicetree/bindings/open-pic.txt     |   46 ++++++++++++++++++++
 .../devicetree/bindings/powerpc/fsl/mpic-timer.txt |   21 +++++----
 arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi    |    7 ++-
 arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi            |    7 ++-
 4 files changed, 66 insertions(+), 15 deletions(-)

diff --git a/Documentation/devicetree/bindings/open-pic.txt b/Documentation/devicetree/bindings/open-pic.txt
index 909a902..045c2e9 100644
--- a/Documentation/devicetree/bindings/open-pic.txt
+++ b/Documentation/devicetree/bindings/open-pic.txt
@@ -92,6 +92,52 @@ Example 2:
 
 * References
 
+* Open PIC global timers
+
+Required properties:
+- compatible: "open-pic,global-timer"
+
+- reg : Contains two regions.  The first is the timer frequency reporting
+  register for the group.  The second is the main timer register bank
+  (GTCCR, GTBCR, GTVPR, GTDR).
+
+- available-ranges: use <start count> style section to define which
+  timer interrupts can be used.  This property is optional; without this,
+  all timers within the group can be used.
+
+- interrupts: one interrupt per timer in the group, in order, starting
+  with timer zero.  If available-ranges is present, only the interrupts
+  that correspond to available timers shall be present.
+
+* Examples
+
+Example 1:
+
+	/* Note that this requires #interrupt-cells to be 4 */
+	timer: timer@010f0 {
+		compatible = "open-pic,global-timer";
+		device_type = "open-pic";
+		reg = <0x010f0 4 0x01100 0x100>;
+
+		/* Another AMP partition is using timer */
+		available-ranges = <2 2>;
+
+		interrupts = <2 0 3 0
+		              3 0 3 0>;
+	};
+
+Example 2:
+
+	timer: timer@010f0 {
+		compatible = "open-pic,global-timer";
+		device_type = "open-pic";
+		reg = <0x010f0 4 0x01100 0x100>;
+		interrupts = <0 0 3 0
+			      1 0 3 0
+			      2 0 3 0
+		              3 0 3 0>;
+	};
+
 [1] Power.org (TM) Standard for Embedded Power Architecture (TM) Platform
     Requirements (ePAPR), Version 1.0, July 2008.
     (http://www.power.org/resources/downloads/Power_ePAPR_APPROVED_v1.0.pdf)
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt b/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt
index df41958..5aafca0 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt
@@ -1,13 +1,14 @@
 * Freescale MPIC timers
 
 Required properties:
-- compatible: "fsl,mpic-global-timer"
+- compatible: "fsl,global-timer"
 
-- reg : Contains two regions.  The first is the main timer register bank
-  (GTCCRxx, GTBCRxx, GTVPRxx, GTDRxx).  The second is the timer control
+- reg : Contains three regions.  The first is the timer frequency reporting
+  register (TFRRx) for the group.  The second is the main timer register
+  bank (GTCCRxx, GTBCRxx, GTVPRxx, GTDRxx).  The third is the timer control
   register (TCRx) for the group.
 
-- fsl,available-ranges: use <start count> style section to define which
+- available-ranges: use <start count> style section to define which
   timer interrupts can be used.  This property is optional; without this,
   all timers within the group can be used.
 
@@ -18,19 +19,21 @@ Required properties:
 Example:
 	/* Note that this requires #interrupt-cells to be 4 */
 	timer0: timer@41100 {
-		compatible = "fsl,mpic-global-timer";
-		reg = <0x41100 0x100 0x41300 4>;
+		compatible = "fsl,global-timer";
+		device_type = "open-pic";
+		reg = <0x410f0 4 0x41100 0x100 0x41300 4>;
 
 		/* Another AMP partition is using timers 0 and 1 */
-		fsl,available-ranges = <2 2>;
+		available-ranges = <2 2>;
 
 		interrupts = <2 0 3 0
 		              3 0 3 0>;
 	};
 
 	timer1: timer@42100 {
-		compatible = "fsl,mpic-global-timer";
-		reg = <0x42100 0x100 0x42300 4>;
+		compatible = "fsl,global-timer";
+		device_type = "open-pic";
+		reg = <0x420f0 4 0x42100 0x100 0x42300 4>;
 		interrupts = <4 0 3 0
 		              5 0 3 0
 		              6 0 3 0
diff --git a/arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi b/arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi
index 8734cff..01cd33c 100644
--- a/arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi
+++ b/arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi
@@ -32,9 +32,10 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-timer@42100 {
-	compatible = "fsl,mpic-global-timer";
-	reg = <0x42100 0x100 0x42300 4>;
+timer@420f0 {
+	compatible = "fsl,global-timer";
+	device_type = "open-pic";
+	reg = <0x420f0 4 0x42100 0x100 0x42300 4>;
 	interrupts = <4 0 3 0
 		      5 0 3 0
 		      6 0 3 0
diff --git a/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi b/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
index 71c30eb..c71d8e0 100644
--- a/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
+++ b/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
@@ -44,9 +44,10 @@ mpic: pic@40000 {
 	last-interrupt-source = <255>;
 };
 
-timer@41100 {
-	compatible = "fsl,mpic-global-timer";
-	reg = <0x41100 0x100 0x41300 4>;
+timer@410f0 {
+	compatible = "fsl,global-timer";
+	device_type = "open-pic";
+	reg = <0x410f0 4 0x41100 0x100 0x41300 4>;
 	interrupts = <0 0 3 0
 		      1 0 3 0
 		      2 0 3 0
-- 
1.7.5.1

Re: [PATCH v2 1/2] powerpc/mpic: Add Open-PIC global timer document

[Gala Kumar-B11780]

On Aug 10, 2012, at 12:53 AM, <Dongsheng.wang@freescale.com> <Dongsheng.wan=
g@freescale.com> wrote:

> From: Wang Dongsheng <Dongsheng.Wang@freescale.com>
>=20
> Add a description of the OPEN-PIC global timer in the OPEN-PIC document.
>=20
> Moidfy mpic-timer document. 1.Add a TFRR register region. This register
> is written by software to report the clocking frequency of the PIC timers=
.
> 2.Add a device_type. The global timer in line with the OPEN-PIC specifica=
tion.
>=20
> Signed-off-by: Wang Dongsheng <Dongsheng.Wang@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> ---
> Documentation/devicetree/bindings/open-pic.txt     |   46 +++++++++++++++=
+++++

Let's separate out the open-pic.txt timer binding change into its own patch=
 from the FSL timer binding & dtsi updates.

> .../devicetree/bindings/powerpc/fsl/mpic-timer.txt |   21 +++++----
> arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi    |    7 ++-
> arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi            |    7 ++-
> 4 files changed, 66 insertions(+), 15 deletions(-)
>=20
> diff --git a/Documentation/devicetree/bindings/open-pic.txt b/Documentati=
on/devicetree/bindings/open-pic.txt
> index 909a902..045c2e9 100644
> --- a/Documentation/devicetree/bindings/open-pic.txt
> +++ b/Documentation/devicetree/bindings/open-pic.txt
> @@ -92,6 +92,52 @@ Example 2:
>=20
> * References
>=20
> +* Open PIC global timers
> +
> +Required properties:
> +- compatible: "open-pic,global-timer"
> +
> +- reg : Contains two regions.  The first is the timer frequency reportin=
g
> +  register for the group.  The second is the main timer register bank
> +  (GTCCR, GTBCR, GTVPR, GTDR).
> +
> +- available-ranges: use <start count> style section to define which
> +  timer interrupts can be used.  This property is optional; without this=
,
> +  all timers within the group can be used.
> +
> +- interrupts: one interrupt per timer in the group, in order, starting
> +  with timer zero.  If available-ranges is present, only the interrupts
> +  that correspond to available timers shall be present.
> +

If we are going to require device_type property it should be in the binding=
.

Based on the comments in ePAPR, I recommend dropping device_type from the t=
imer binding.

> +* Examples
> +
> +Example 1:
> +
> +	/* Note that this requires #interrupt-cells to be 4 */
> +	timer: timer@010f0 {
> +		compatible =3D "open-pic,global-timer";
> +		device_type =3D "open-pic";
> +		reg =3D <0x010f0 4 0x01100 0x100>;
> +
> +		/* Another AMP partition is using timer */
> +		available-ranges =3D <2 2>;
> +
> +		interrupts =3D <2 0 3 0
> +		              3 0 3 0>;
> +	};
> +
> +Example 2:
> +
> +	timer: timer@010f0 {
> +		compatible =3D "open-pic,global-timer";
> +		device_type =3D "open-pic";
> +		reg =3D <0x010f0 4 0x01100 0x100>;
> +		interrupts =3D <0 0 3 0
> +			      1 0 3 0
> +			      2 0 3 0
> +		              3 0 3 0>;
> +	};
> +
> [1] Power.org (TM) Standard for Embedded Power Architecture (TM) Platform
>     Requirements (ePAPR), Version 1.0, July 2008.
>     (http://www.power.org/resources/downloads/Power_ePAPR_APPROVED_v1.0.p=
df)
> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt=
 b/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt
> index df41958..5aafca0 100644
> --- a/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt
> +++ b/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt
> @@ -1,13 +1,14 @@
> * Freescale MPIC timers
>=20
> Required properties:
> -- compatible: "fsl,mpic-global-timer"
> +- compatible: "fsl,global-timer"

Why are renaming?.. also use of fsl,global-timer is to generic of a name fo=
r the this.

>=20
> -- reg : Contains two regions.  The first is the main timer register bank
> -  (GTCCRxx, GTBCRxx, GTVPRxx, GTDRxx).  The second is the timer control
> +- reg : Contains three regions.  The first is the timer frequency report=
ing
> +  register (TFRRx) for the group.  The second is the main timer register
> +  bank (GTCCRxx, GTBCRxx, GTVPRxx, GTDRxx).  The third is the timer cont=
rol
>   register (TCRx) for the group.
>=20
> -- fsl,available-ranges: use <start count> style section to define which
> +- available-ranges: use <start count> style section to define which
>   timer interrupts can be used.  This property is optional; without this,
>   all timers within the group can be used.
>=20
> @@ -18,19 +19,21 @@ Required properties:
> Example:
> 	/* Note that this requires #interrupt-cells to be 4 */
> 	timer0: timer@41100 {
> -		compatible =3D "fsl,mpic-global-timer";
> -		reg =3D <0x41100 0x100 0x41300 4>;
> +		compatible =3D "fsl,global-timer";
> +		device_type =3D "open-pic";
> +		reg =3D <0x410f0 4 0x41100 0x100 0x41300 4>;
>=20
> 		/* Another AMP partition is using timers 0 and 1 */
> -		fsl,available-ranges =3D <2 2>;
> +		available-ranges =3D <2 2>;
>=20
> 		interrupts =3D <2 0 3 0
> 		              3 0 3 0>;
> 	};
>=20
> 	timer1: timer@42100 {
> -		compatible =3D "fsl,mpic-global-timer";
> -		reg =3D <0x42100 0x100 0x42300 4>;
> +		compatible =3D "fsl,global-timer";
> +		device_type =3D "open-pic";
> +		reg =3D <0x420f0 4 0x42100 0x100 0x42300 4>;
> 		interrupts =3D <4 0 3 0
> 		              5 0 3 0
> 		              6 0 3 0
> diff --git a/arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi b/arch/power=
pc/boot/dts/fsl/pq3-mpic-timer-B.dtsi
> index 8734cff..01cd33c 100644
> --- a/arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi
> @@ -32,9 +32,10 @@
>  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
>  */
>=20
> -timer@42100 {
> -	compatible =3D "fsl,mpic-global-timer";
> -	reg =3D <0x42100 0x100 0x42300 4>;
> +timer@420f0 {
> +	compatible =3D "fsl,global-timer";

Shouldn't this be:

	compatible =3D "fsl,mpic-global-timer", "open-pic,global-timer";

> +	device_type =3D "open-pic";
> +	reg =3D <0x420f0 4 0x42100 0x100 0x42300 4>;
> 	interrupts =3D <4 0 3 0
> 		      5 0 3 0
> 		      6 0 3 0
> diff --git a/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi b/arch/powerpc/boot/=
dts/fsl/pq3-mpic.dtsi
> index 71c30eb..c71d8e0 100644
> --- a/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
> @@ -44,9 +44,10 @@ mpic: pic@40000 {
> 	last-interrupt-source =3D <255>;
> };
>=20
> -timer@41100 {
> -	compatible =3D "fsl,mpic-global-timer";
> -	reg =3D <0x41100 0x100 0x41300 4>;
> +timer@410f0 {
> +	compatible =3D "fsl,global-timer";

same as above.

> +	device_type =3D "open-pic";
> +	reg =3D <0x410f0 4 0x41100 0x100 0x41300 4>;
> 	interrupts =3D <0 0 3 0
> 		      1 0 3 0
> 		      2 0 3 0
> --=20
> 1.7.5.1
>=20
>=20
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss

Re: [PATCH v2 1/2] powerpc/mpic: Add Open-PIC global timer document

[Scott Wood]

On 08/10/2012 12:53 AM, Dongsheng.wang@freescale.com wrote:
> From: Wang Dongsheng <Dongsheng.Wang@freescale.com>
> 
> Add a description of the OPEN-PIC global timer in the OPEN-PIC document.
> 
> Moidfy mpic-timer document. 1.Add a TFRR register region. This register
> is written by software to report the clocking frequency of the PIC timers.
> 2.Add a device_type. The global timer in line with the OPEN-PIC specification.
> 
> Signed-off-by: Wang Dongsheng <Dongsheng.Wang@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> ---
>  Documentation/devicetree/bindings/open-pic.txt     |   46 ++++++++++++++++++++
>  .../devicetree/bindings/powerpc/fsl/mpic-timer.txt |   21 +++++----
>  arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi    |    7 ++-
>  arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi            |    7 ++-
>  4 files changed, 66 insertions(+), 15 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/open-pic.txt b/Documentation/devicetree/bindings/open-pic.txt
> index 909a902..045c2e9 100644
> --- a/Documentation/devicetree/bindings/open-pic.txt
> +++ b/Documentation/devicetree/bindings/open-pic.txt
> @@ -92,6 +92,52 @@ Example 2:
>  
>  * References
>  
> +* Open PIC global timers
> +
> +Required properties:
> +- compatible: "open-pic,global-timer"

open-pic isn't a vendor (or software project that acts like a
pseudo-vendor) -- I'd go with "open-pic-global-timer".

> +- reg : Contains two regions.  The first is the timer frequency reporting
> +  register for the group.  The second is the main timer register bank
> +  (GTCCR, GTBCR, GTVPR, GTDR).

Why not just put clock-frequency in the node, instead of describing
TFRR?  I don't think U-Boot currently sets TFRR.

> +- available-ranges: use <start count> style section to define which
> +  timer interrupts can be used.  This property is optional; without this,
> +  all timers within the group can be used.
> +
> +- interrupts: one interrupt per timer in the group, in order, starting
> +  with timer zero.  If available-ranges is present, only the interrupts
> +  that correspond to available timers shall be present.
> +
> +* Examples
> +
> +Example 1:
> +
> +	/* Note that this requires #interrupt-cells to be 4 */
> +	timer: timer@010f0 {

Unit addres shouldn't have leading zeroes.

> +		compatible = "open-pic,global-timer";
> +		device_type = "open-pic";

Remove device_type.  Not only is it deprecated outside of real OF, it's
wrong -- this isn't an openpic, it's just a subset of it.

> +		reg = <0x010f0 4 0x01100 0x100>;
> +
> +		/* Another AMP partition is using timer */
> +		available-ranges = <2 2>;
>
> +
> +		interrupts = <2 0 3 0
> +		              3 0 3 0>;
> +	};
> +
> +Example 2:
> +
> +	timer: timer@010f0 {
> +		compatible = "open-pic,global-timer";
> +		device_type = "open-pic";
> +		reg = <0x010f0 4 0x01100 0x100>;
> +		interrupts = <0 0 3 0
> +			      1 0 3 0
> +			      2 0 3 0
> +		              3 0 3 0>;
> +	};

4-cell interrupt specifiers are specific to Freescale MPICs.  This means
there's no way to describe the timer interrupt on a non-Freescale
openpic.  Again, I suggest we not bother with this in the absence of an
actual need to support the timer on non-Freescale openpic in partitioned
scenarios.  The existing openpic node is sufficient to describe the
hardware in the absence of partitioning.   We could have an
"openpic-no-timer" property to indicate that we're describing it
separately, so that the absence of a timer node isn't ambiguous as to
whether it's an old tree or a partitioned scenario.  An fsl,mpic
compatible would imply openpic-no-timer.

Note that I believe many of the non-Freescale openpic nodes are going to
be found on systems with real Open Firmware, so we can't go changing the
device tree for them.

-Scott

RE: [PATCH v2 1/2] powerpc/mpic: Add Open-PIC global timer document

[Wang Dongsheng-B40534]

>=20
> > a/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt
> > b/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt
> > index df41958..5aafca0 100644
> > --- a/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt
> > +++ b/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt
> > @@ -1,13 +1,14 @@
> > * Freescale MPIC timers
> >
> > Required properties:
> > -- compatible: "fsl,mpic-global-timer"
> > +- compatible: "fsl,global-timer"
>=20
> Why are renaming?.. also use of fsl,global-timer is to generic of a name
> for the this.
>=20
[Wang Dongsheng] "fsl,global-timer" is generic of a name.

RE: [PATCH v2 1/2] powerpc/mpic: Add Open-PIC global timer document

[Wang Dongsheng-B40534]

PiA+IGRpZmYgLS1naXQgYS9Eb2N1bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3Mvb3Blbi1w
aWMudHh0DQo+ID4gYi9Eb2N1bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3Mvb3Blbi1waWMu
dHh0DQo+ID4gaW5kZXggOTA5YTkwMi4uMDQ1YzJlOSAxMDA2NDQNCj4gPiAtLS0gYS9Eb2N1bWVu
dGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3Mvb3Blbi1waWMudHh0DQo+ID4gKysrIGIvRG9jdW1l
bnRhdGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdzL29wZW4tcGljLnR4dA0KPiA+IEBAIC05Miw2ICs5
Miw1MiBAQCBFeGFtcGxlIDI6DQo+ID4NCj4gPiAgKiBSZWZlcmVuY2VzDQo+ID4NCj4gPiArKiBP
cGVuIFBJQyBnbG9iYWwgdGltZXJzDQo+ID4gKw0KPiA+ICtSZXF1aXJlZCBwcm9wZXJ0aWVzOg0K
PiA+ICstIGNvbXBhdGlibGU6ICJvcGVuLXBpYyxnbG9iYWwtdGltZXIiDQo+IA0KPiBvcGVuLXBp
YyBpc24ndCBhIHZlbmRvciAob3Igc29mdHdhcmUgcHJvamVjdCB0aGF0IGFjdHMgbGlrZSBhDQo+
IHBzZXVkby12ZW5kb3IpIC0tIEknZCBnbyB3aXRoICJvcGVuLXBpYy1nbG9iYWwtdGltZXIiLg0K
PiANCltXYW5nIERvbmdzaGVuZ10geWVzLCAib3Blbi1waWMtZ2xvYmFsLXRpbWVyIiBsb29rcyBn
b29kLg0KDQo+ID4gKy0gcmVnIDogQ29udGFpbnMgdHdvIHJlZ2lvbnMuICBUaGUgZmlyc3QgaXMg
dGhlIHRpbWVyIGZyZXF1ZW5jeQ0KPiA+ICtyZXBvcnRpbmcNCj4gPiArICByZWdpc3RlciBmb3Ig
dGhlIGdyb3VwLiAgVGhlIHNlY29uZCBpcyB0aGUgbWFpbiB0aW1lciByZWdpc3RlciBiYW5rDQo+
ID4gKyAgKEdUQ0NSLCBHVEJDUiwgR1RWUFIsIEdURFIpLg0KPiANCj4gV2h5IG5vdCBqdXN0IHB1
dCBjbG9jay1mcmVxdWVuY3kgaW4gdGhlIG5vZGUsIGluc3RlYWQgb2YgZGVzY3JpYmluZyBURlJS
Pw0KPiBJIGRvbid0IHRoaW5rIFUtQm9vdCBjdXJyZW50bHkgc2V0cyBURlJSLg0KPiANCltXYW5n
IERvbmdzaGVuZ10gSWYgZHVyaW5nIHN0YXJ0dXAgVS1Cb290IGRvIG5vdCBzZXQgVEZSUiB0aGF0
IGlzIHVucmVhc29uYWJsZS4NCkluIE9wZW4tUElDIHRoaXMgaXMgbm90IGFsbG93ZWQuIFdlIHVz
ZWQgaXMgdGhlIENDQiBmcmVxdWVuY3kgaW4gRlNMIGNoaXAuDQpXZSBkbyBub3QgbmVlZCB0byBj
YXJlIGFib3V0IHRoZSB2YWx1ZSBvZiB0aGlzIHJlZ2lzdGVyLiBCdXQgd2UgbXVzdCBzdXBwb3J0
IA0KVEZSUi4NCg0KPiA+ICsJCXJlZyA9IDwweDAxMGYwIDQgMHgwMTEwMCAweDEwMD47DQo+ID4g
Kw0KPiA+ICsJCS8qIEFub3RoZXIgQU1QIHBhcnRpdGlvbiBpcyB1c2luZyB0aW1lciAqLw0KPiA+
ICsJCWF2YWlsYWJsZS1yYW5nZXMgPSA8MiAyPjsNCj4gPg0KPiA+ICsNCj4gPiArCQlpbnRlcnJ1
cHRzID0gPDIgMCAzIDANCj4gPiArCQkgICAgICAgICAgICAgIDMgMCAzIDA+Ow0KPiA+ICsJfTsN
Cj4gPiArDQo+ID4gK0V4YW1wbGUgMjoNCj4gPiArDQo+ID4gKwl0aW1lcjogdGltZXJAMDEwZjAg
ew0KPiA+ICsJCWNvbXBhdGlibGUgPSAib3Blbi1waWMsZ2xvYmFsLXRpbWVyIjsNCj4gPiArCQlk
ZXZpY2VfdHlwZSA9ICJvcGVuLXBpYyI7DQo+ID4gKwkJcmVnID0gPDB4MDEwZjAgNCAweDAxMTAw
IDB4MTAwPjsNCj4gPiArCQlpbnRlcnJ1cHRzID0gPDAgMCAzIDANCj4gPiArCQkJICAgICAgMSAw
IDMgMA0KPiA+ICsJCQkgICAgICAyIDAgMyAwDQo+ID4gKwkJICAgICAgICAgICAgICAzIDAgMyAw
PjsNCj4gPiArCX07DQo+IA0KPiA0LWNlbGwgaW50ZXJydXB0IHNwZWNpZmllcnMgYXJlIHNwZWNp
ZmljIHRvIEZyZWVzY2FsZSBNUElDcy4gIFRoaXMgbWVhbnMNCj4gdGhlcmUncyBubyB3YXkgdG8g
ZGVzY3JpYmUgdGhlIHRpbWVyIGludGVycnVwdCBvbiBhIG5vbi1GcmVlc2NhbGUgb3BlbnBpYy4N
Cj4gQWdhaW4sIEkgc3VnZ2VzdCB3ZSBub3QgYm90aGVyIHdpdGggdGhpcyBpbiB0aGUgYWJzZW5j
ZSBvZiBhbiBhY3R1YWwgbmVlZA0KPiB0byBzdXBwb3J0IHRoZSB0aW1lciBvbiBub24tRnJlZXNj
YWxlIG9wZW5waWMgaW4gcGFydGl0aW9uZWQgc2NlbmFyaW9zLg0KPiBUaGUgZXhpc3Rpbmcgb3Bl
bnBpYyBub2RlIGlzIHN1ZmZpY2llbnQgdG8gZGVzY3JpYmUgdGhlDQo+IGhhcmR3YXJlIGluIHRo
ZSBhYnNlbmNlIG9mIHBhcnRpdGlvbmluZy4gICBXZSBjb3VsZCBoYXZlIGFuDQo+ICJvcGVucGlj
LW5vLXRpbWVyIiBwcm9wZXJ0eSB0byBpbmRpY2F0ZSB0aGF0IHdlJ3JlIGRlc2NyaWJpbmcgaXQN
Cj4gc2VwYXJhdGVseSwgc28gdGhhdCB0aGUgYWJzZW5jZSBvZiBhIHRpbWVyIG5vZGUgaXNuJ3Qg
YW1iaWd1b3VzIGFzIHRvDQo+IHdoZXRoZXIgaXQncyBhbiBvbGQgdHJlZSBvciBhIHBhcnRpdGlv
bmVkIHNjZW5hcmlvLiAgQW4gZnNsLG1waWMNCj4gY29tcGF0aWJsZSB3b3VsZCBpbXBseSBvcGVu
cGljLW5vLXRpbWVyLg0KPiANCj4gTm90ZSB0aGF0IEkgYmVsaWV2ZSBtYW55IG9mIHRoZSBub24t
RnJlZXNjYWxlIG9wZW5waWMgbm9kZXMgYXJlIGdvaW5nIHRvDQo+IGJlIGZvdW5kIG9uIHN5c3Rl
bXMgd2l0aCByZWFsIE9wZW4gRmlybXdhcmUsIHNvIHdlIGNhbid0IGdvIGNoYW5naW5nIHRoZQ0K
PiBkZXZpY2UgdHJlZSBmb3IgdGhlbS4NCltXYW5nIERvbmdzaGVuZ10gSW4gdGhlIE9wZW4tUElD
IHNwZWNpZmljYXRpb24sIHRoZXJlIGFyZSBmb3VyIHRpbWVyLg0KCQlpbnRlcnJ1cHRzID0gPDAg
MCAzIDANCgkJCSAgICAgIDEgMCAzIDANCgkJCSAgICAgIDIgMCAzIDANCgkJICAgICAgICAgICAg
ICAzIDAgMyAwPjsNCg0KVGhlICJpbnRlcnJ1cHRzIiBqdXN0IGxldCB1c2VyIGtub3cgdGhlcmUg
YXJlIGZvdXIgdGltZXJzLiBVc2FnZSBiYXNlZCAiaW50ZXJydXB0cyINCmJpbmRpbmcgdG8gY2hh
bmdlIGR0cy4NCg0KPiANCj4gLVNjb3R0DQoNCg==

Re: [PATCH v2 1/2] powerpc/mpic: Add Open-PIC global timer document

[Scott Wood]

On 08/13/2012 12:40 AM, Wang Dongsheng-B40534 wrote:
>>> diff --git a/Documentation/devicetree/bindings/open-pic.txt
>>> b/Documentation/devicetree/bindings/open-pic.txt
>>> index 909a902..045c2e9 100644
>>> --- a/Documentation/devicetree/bindings/open-pic.txt
>>> +++ b/Documentation/devicetree/bindings/open-pic.txt
>>> @@ -92,6 +92,52 @@ Example 2:
>>>
>>>  * References
>>>
>>> +* Open PIC global timers
>>> +
>>> +Required properties:
>>> +- compatible: "open-pic,global-timer"
>>
>> open-pic isn't a vendor (or software project that acts like a
>> pseudo-vendor) -- I'd go with "open-pic-global-timer".
>>
> [Wang Dongsheng] yes, "open-pic-global-timer" looks good.
> 
>>> +- reg : Contains two regions.  The first is the timer frequency
>>> +reporting
>>> +  register for the group.  The second is the main timer register bank
>>> +  (GTCCR, GTBCR, GTVPR, GTDR).
>>
>> Why not just put clock-frequency in the node, instead of describing TFRR?
>> I don't think U-Boot currently sets TFRR.
>>
> [Wang Dongsheng] If during startup U-Boot do not set TFRR that is unreasonable.

Too bad, it's what happens and we're not going to force users to update
U-Boot because of this.

>>> +Example 2:
>>> +
>>> +	timer: timer@010f0 {
>>> +		compatible = "open-pic,global-timer";
>>> +		device_type = "open-pic";
>>> +		reg = <0x010f0 4 0x01100 0x100>;
>>> +		interrupts = <0 0 3 0
>>> +			      1 0 3 0
>>> +			      2 0 3 0
>>> +		              3 0 3 0>;
>>> +	};
>>
>> 4-cell interrupt specifiers are specific to Freescale MPICs.  This means
>> there's no way to describe the timer interrupt on a non-Freescale openpic.
>> Again, I suggest we not bother with this in the absence of an actual need
>> to support the timer on non-Freescale openpic in partitioned scenarios.
>> The existing openpic node is sufficient to describe the
>> hardware in the absence of partitioning.   We could have an
>> "openpic-no-timer" property to indicate that we're describing it
>> separately, so that the absence of a timer node isn't ambiguous as to
>> whether it's an old tree or a partitioned scenario.  An fsl,mpic
>> compatible would imply openpic-no-timer.
>>
>> Note that I believe many of the non-Freescale openpic nodes are going to
>> be found on systems with real Open Firmware, so we can't go changing the
>> device tree for them.
> [Wang Dongsheng] In the Open-PIC specification, there are four timer.
> 		interrupts = <0 0 3 0
> 			      1 0 3 0
> 			      2 0 3 0
> 		              3 0 3 0>;
> 
> The "interrupts" just let user know there are four timers. Usage based "interrupts"
> binding to change dts.

I can't understand the above or how it's a response to what I wrote.

-Scott

RE: [PATCH v2 1/2] powerpc/mpic: Add Open-PIC global timer document

[Wang Dongsheng-B40534]

DQoNCj4gLS0tLS1PcmlnaW5hbCBNZXNzYWdlLS0tLS0NCj4gRnJvbTogV29vZCBTY290dC1CMDc0
MjENCj4gU2VudDogVHVlc2RheSwgQXVndXN0IDE0LCAyMDEyIDE6NDAgQU0NCj4gVG86IFdhbmcg
RG9uZ3NoZW5nLUI0MDUzNA0KPiBDYzogV29vZCBTY290dC1CMDc0MjE7IGJlbmhAa2VybmVsLmNy
YXNoaW5nLm9yZzsgcGF1bHVzQHNhbWJhLm9yZzsNCj4gbGludXhwcGMtZGV2QGxpc3RzLm96bGFi
cy5vcmc7IGRldmljZXRyZWUtZGlzY3Vzc0BsaXN0cy5vemxhYnMub3JnOyBHYWxhDQo+IEt1bWFy
LUIxMTc4MDsgTGkgWWFuZy1SNTg0NzINCj4gU3ViamVjdDogUmU6IFtQQVRDSCB2MiAxLzJdIHBv
d2VycGMvbXBpYzogQWRkIE9wZW4tUElDIGdsb2JhbCB0aW1lcg0KPiBkb2N1bWVudA0KPiANCj4g
T24gMDgvMTMvMjAxMiAxMjo0MCBBTSwgV2FuZyBEb25nc2hlbmctQjQwNTM0IHdyb3RlOg0KPiA+
Pj4gZGlmZiAtLWdpdCBhL0RvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9vcGVuLXBp
Yy50eHQNCj4gPj4+IGIvRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdzL29wZW4tcGlj
LnR4dA0KPiA+Pj4gaW5kZXggOTA5YTkwMi4uMDQ1YzJlOSAxMDA2NDQNCj4gPj4+IC0tLSBhL0Rv
Y3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9vcGVuLXBpYy50eHQNCj4gPj4+ICsrKyBi
L0RvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9vcGVuLXBpYy50eHQNCj4gPj4+IEBA
IC05Miw2ICs5Miw1MiBAQCBFeGFtcGxlIDI6DQo+ID4+Pg0KPiA+Pj4gICogUmVmZXJlbmNlcw0K
PiA+Pj4NCj4gPj4+ICsqIE9wZW4gUElDIGdsb2JhbCB0aW1lcnMNCj4gPj4+ICsNCj4gPj4+ICtS
ZXF1aXJlZCBwcm9wZXJ0aWVzOg0KPiA+Pj4gKy0gY29tcGF0aWJsZTogIm9wZW4tcGljLGdsb2Jh
bC10aW1lciINCj4gPj4NCj4gPj4gb3Blbi1waWMgaXNuJ3QgYSB2ZW5kb3IgKG9yIHNvZnR3YXJl
IHByb2plY3QgdGhhdCBhY3RzIGxpa2UgYQ0KPiA+PiBwc2V1ZG8tdmVuZG9yKSAtLSBJJ2QgZ28g
d2l0aCAib3Blbi1waWMtZ2xvYmFsLXRpbWVyIi4NCj4gPj4NCj4gPiBbV2FuZyBEb25nc2hlbmdd
IHllcywgIm9wZW4tcGljLWdsb2JhbC10aW1lciIgbG9va3MgZ29vZC4NCj4gPg0KPiA+Pj4gKy0g
cmVnIDogQ29udGFpbnMgdHdvIHJlZ2lvbnMuICBUaGUgZmlyc3QgaXMgdGhlIHRpbWVyIGZyZXF1
ZW5jeQ0KPiA+Pj4gK3JlcG9ydGluZw0KPiA+Pj4gKyAgcmVnaXN0ZXIgZm9yIHRoZSBncm91cC4g
IFRoZSBzZWNvbmQgaXMgdGhlIG1haW4gdGltZXIgcmVnaXN0ZXINCj4gPj4+ICtiYW5rDQo+ID4+
PiArICAoR1RDQ1IsIEdUQkNSLCBHVFZQUiwgR1REUikuDQo+ID4+DQo+ID4+IFdoeSBub3QganVz
dCBwdXQgY2xvY2stZnJlcXVlbmN5IGluIHRoZSBub2RlLCBpbnN0ZWFkIG9mIGRlc2NyaWJpbmcN
Cj4gVEZSUj8NCj4gPj4gSSBkb24ndCB0aGluayBVLUJvb3QgY3VycmVudGx5IHNldHMgVEZSUi4N
Cj4gPj4NCj4gPiBbV2FuZyBEb25nc2hlbmddIElmIGR1cmluZyBzdGFydHVwIFUtQm9vdCBkbyBu
b3Qgc2V0IFRGUlIgdGhhdCBpcw0KPiB1bnJlYXNvbmFibGUuDQo+IA0KPiBUb28gYmFkLCBpdCdz
IHdoYXQgaGFwcGVucyBhbmQgd2UncmUgbm90IGdvaW5nIHRvIGZvcmNlIHVzZXJzIHRvIHVwZGF0
ZQ0KPiBVLUJvb3QgYmVjYXVzZSBvZiB0aGlzLg0KPiANCj4gPj4+ICtFeGFtcGxlIDI6DQo+ID4+
PiArDQo+ID4+PiArCXRpbWVyOiB0aW1lckAwMTBmMCB7DQo+ID4+PiArCQljb21wYXRpYmxlID0g
Im9wZW4tcGljLGdsb2JhbC10aW1lciI7DQo+ID4+PiArCQlkZXZpY2VfdHlwZSA9ICJvcGVuLXBp
YyI7DQo+ID4+PiArCQlyZWcgPSA8MHgwMTBmMCA0IDB4MDExMDAgMHgxMDA+Ow0KPiA+Pj4gKwkJ
aW50ZXJydXB0cyA9IDwwIDAgMyAwDQo+ID4+PiArCQkJICAgICAgMSAwIDMgMA0KPiA+Pj4gKwkJ
CSAgICAgIDIgMCAzIDANCj4gPj4+ICsJCSAgICAgICAgICAgICAgMyAwIDMgMD47DQo+ID4+PiAr
CX07DQo+ID4+DQo+ID4+IDQtY2VsbCBpbnRlcnJ1cHQgc3BlY2lmaWVycyBhcmUgc3BlY2lmaWMg
dG8gRnJlZXNjYWxlIE1QSUNzLiAgVGhpcw0KPiA+PiBtZWFucyB0aGVyZSdzIG5vIHdheSB0byBk
ZXNjcmliZSB0aGUgdGltZXIgaW50ZXJydXB0IG9uIGEgbm9uLQ0KPiBGcmVlc2NhbGUgb3BlbnBp
Yy4NCj4gPj4gQWdhaW4sIEkgc3VnZ2VzdCB3ZSBub3QgYm90aGVyIHdpdGggdGhpcyBpbiB0aGUg
YWJzZW5jZSBvZiBhbiBhY3R1YWwNCj4gPj4gbmVlZCB0byBzdXBwb3J0IHRoZSB0aW1lciBvbiBu
b24tRnJlZXNjYWxlIG9wZW5waWMgaW4gcGFydGl0aW9uZWQNCj4gc2NlbmFyaW9zLg0KPiA+PiBU
aGUgZXhpc3Rpbmcgb3BlbnBpYyBub2RlIGlzIHN1ZmZpY2llbnQgdG8gZGVzY3JpYmUgdGhlDQo+
ID4+IGhhcmR3YXJlIGluIHRoZSBhYnNlbmNlIG9mIHBhcnRpdGlvbmluZy4gICBXZSBjb3VsZCBo
YXZlIGFuDQo+ID4+ICJvcGVucGljLW5vLXRpbWVyIiBwcm9wZXJ0eSB0byBpbmRpY2F0ZSB0aGF0
IHdlJ3JlIGRlc2NyaWJpbmcgaXQNCj4gPj4gc2VwYXJhdGVseSwgc28gdGhhdCB0aGUgYWJzZW5j
ZSBvZiBhIHRpbWVyIG5vZGUgaXNuJ3QgYW1iaWd1b3VzIGFzIHRvDQo+ID4+IHdoZXRoZXIgaXQn
cyBhbiBvbGQgdHJlZSBvciBhIHBhcnRpdGlvbmVkIHNjZW5hcmlvLiAgQW4gZnNsLG1waWMNCj4g
Pj4gY29tcGF0aWJsZSB3b3VsZCBpbXBseSBvcGVucGljLW5vLXRpbWVyLg0KPiA+Pg0KPiA+PiBO
b3RlIHRoYXQgSSBiZWxpZXZlIG1hbnkgb2YgdGhlIG5vbi1GcmVlc2NhbGUgb3BlbnBpYyBub2Rl
cyBhcmUgZ29pbmcNCj4gPj4gdG8gYmUgZm91bmQgb24gc3lzdGVtcyB3aXRoIHJlYWwgT3BlbiBG
aXJtd2FyZSwgc28gd2UgY2FuJ3QgZ28NCj4gPj4gY2hhbmdpbmcgdGhlIGRldmljZSB0cmVlIGZv
ciB0aGVtLg0KPiA+IFtXYW5nIERvbmdzaGVuZ10gSW4gdGhlIE9wZW4tUElDIHNwZWNpZmljYXRp
b24sIHRoZXJlIGFyZSBmb3VyIHRpbWVyLg0KPiA+IAkJaW50ZXJydXB0cyA9IDwwIDAgMyAwDQo+
ID4gCQkJICAgICAgMSAwIDMgMA0KPiA+IAkJCSAgICAgIDIgMCAzIDANCj4gPiAJCSAgICAgICAg
ICAgICAgMyAwIDMgMD47DQo+ID4NCj4gPiBUaGUgImludGVycnVwdHMiIGp1c3QgbGV0IHVzZXIg
a25vdyB0aGVyZSBhcmUgZm91ciB0aW1lcnMuIFVzYWdlIGJhc2VkDQo+ICJpbnRlcnJ1cHRzIg0K
PiA+IGJpbmRpbmcgdG8gY2hhbmdlIGR0cy4NCj4gDQo+IEkgY2FuJ3QgdW5kZXJzdGFuZCB0aGUg
YWJvdmUgb3IgaG93IGl0J3MgYSByZXNwb25zZSB0byB3aGF0IEkgd3JvdGUuDQo+IA0KW1dhbmcg
RG9uZ3NoZW5nXSBJIG1lYW4gdGhpcyBqdXN0IHRvIHRlbGwgaG93IG1hbnkgdGltZXJzIHRvIHN1
cHBvcnQgaW4gT3Blbi1QSUMNCnNwZWNpZmljYXRpb24uIElmIHNvbWVvbmUgbmVlZHMgdG8gd3Jp
dGUgImludGVycnVwdHMiIGludG8gZHRzLCB0aGlzIG11c3QgY29tcGx5DQp3aXRoIHRoZSBzcGVj
aWZpY2F0aW9uIG9mIHRoZSBpbnRlcnJ1cHQgdG8gd3JpdGUuIHRoaXMgaXMgYmFzZWQgb24gdGhl
IHBpYyBkcml2ZXINCnNob3VsZCBiZSBjaGFuZ2VkIGluIGRpZmZlcmVudCBwbGF0Zm9ybXMuDQoN
Cj4gLVNjb3R0DQoNCg==

Re: [PATCH v2 1/2] powerpc/mpic: Add Open-PIC global timer document

[Scott Wood]

On 08/13/2012 09:40 PM, Wang Dongsheng-B40534 wrote:
>>>> +Example 2:
>>>>> +
>>>>> +	timer: timer@010f0 {
>>>>> +		compatible = "open-pic,global-timer";
>>>>> +		device_type = "open-pic";
>>>>> +		reg = <0x010f0 4 0x01100 0x100>;
>>>>> +		interrupts = <0 0 3 0
>>>>> +			      1 0 3 0
>>>>> +			      2 0 3 0
>>>>> +		              3 0 3 0>;
>>>>> +	};
>>>>
>>>> 4-cell interrupt specifiers are specific to Freescale MPICs.  This
>>>> means there's no way to describe the timer interrupt on a non-
>> Freescale openpic.
>>>> Again, I suggest we not bother with this in the absence of an actual
>>>> need to support the timer on non-Freescale openpic in partitioned
>> scenarios.
>>>> The existing openpic node is sufficient to describe the
>>>> hardware in the absence of partitioning.   We could have an
>>>> "openpic-no-timer" property to indicate that we're describing it
>>>> separately, so that the absence of a timer node isn't ambiguous as to
>>>> whether it's an old tree or a partitioned scenario.  An fsl,mpic
>>>> compatible would imply openpic-no-timer.
>>>>
>>>> Note that I believe many of the non-Freescale openpic nodes are going
>>>> to be found on systems with real Open Firmware, so we can't go
>>>> changing the device tree for them.
>>> [Wang Dongsheng] In the Open-PIC specification, there are four timer.
>>> 		interrupts = <0 0 3 0
>>> 			      1 0 3 0
>>> 			      2 0 3 0
>>> 		              3 0 3 0>;
>>>
>>> The "interrupts" just let user know there are four timers. Usage based
>> "interrupts"
>>> binding to change dts.
>>
>> I can't understand the above or how it's a response to what I wrote.
>>
> [Wang Dongsheng] I mean this just to tell how many timers to support in Open-PIC
> specification. If someone needs to write "interrupts" into dts, this must comply
> with the specification of the interrupt to write. this is based on the pic driver
> should be changed in different platforms.

My point (beyond that examples provided should be valid for *some*
system) is there is no valid thing to put in the interrupts property
here when the interrupt controller is not "fsl,mpic", so this doesn't work.

-Scott

RE: [PATCH v2 1/2] powerpc/mpic: Add Open-PIC global timer document

[Wang Dongsheng-B40534]

DQoNCj4gLS0tLS1PcmlnaW5hbCBNZXNzYWdlLS0tLS0NCj4gRnJvbTogV29vZCBTY290dC1CMDc0
MjENCj4gU2VudDogV2VkbmVzZGF5LCBBdWd1c3QgMTUsIDIwMTIgNToxOSBBTQ0KPiBUbzogV2Fu
ZyBEb25nc2hlbmctQjQwNTM0DQo+IENjOiBXb29kIFNjb3R0LUIwNzQyMTsgYmVuaEBrZXJuZWwu
Y3Jhc2hpbmcub3JnOyBwYXVsdXNAc2FtYmEub3JnOw0KPiBsaW51eHBwYy1kZXZAbGlzdHMub3ps
YWJzLm9yZzsgZGV2aWNldHJlZS1kaXNjdXNzQGxpc3RzLm96bGFicy5vcmc7IEdhbGENCj4gS3Vt
YXItQjExNzgwOyBMaSBZYW5nLVI1ODQ3Mg0KPiBTdWJqZWN0OiBSZTogW1BBVENIIHYyIDEvMl0g
cG93ZXJwYy9tcGljOiBBZGQgT3Blbi1QSUMgZ2xvYmFsIHRpbWVyDQo+IGRvY3VtZW50DQo+IA0K
PiBPbiAwOC8xMy8yMDEyIDA5OjQwIFBNLCBXYW5nIERvbmdzaGVuZy1CNDA1MzQgd3JvdGU6DQo+
ID4+Pj4gK0V4YW1wbGUgMjoNCj4gPj4+Pj4gKw0KPiA+Pj4+PiArCXRpbWVyOiB0aW1lckAwMTBm
MCB7DQo+ID4+Pj4+ICsJCWNvbXBhdGlibGUgPSAib3Blbi1waWMsZ2xvYmFsLXRpbWVyIjsNCj4g
Pj4+Pj4gKwkJZGV2aWNlX3R5cGUgPSAib3Blbi1waWMiOw0KPiA+Pj4+PiArCQlyZWcgPSA8MHgw
MTBmMCA0IDB4MDExMDAgMHgxMDA+Ow0KPiA+Pj4+PiArCQlpbnRlcnJ1cHRzID0gPDAgMCAzIDAN
Cj4gPj4+Pj4gKwkJCSAgICAgIDEgMCAzIDANCj4gPj4+Pj4gKwkJCSAgICAgIDIgMCAzIDANCj4g
Pj4+Pj4gKwkJICAgICAgICAgICAgICAzIDAgMyAwPjsNCj4gPj4+Pj4gKwl9Ow0KPiA+Pj4+DQo+
ID4+Pj4gNC1jZWxsIGludGVycnVwdCBzcGVjaWZpZXJzIGFyZSBzcGVjaWZpYyB0byBGcmVlc2Nh
bGUgTVBJQ3MuICBUaGlzDQo+ID4+Pj4gbWVhbnMgdGhlcmUncyBubyB3YXkgdG8gZGVzY3JpYmUg
dGhlIHRpbWVyIGludGVycnVwdCBvbiBhIG5vbi0NCj4gPj4gRnJlZXNjYWxlIG9wZW5waWMuDQo+
ID4+Pj4gQWdhaW4sIEkgc3VnZ2VzdCB3ZSBub3QgYm90aGVyIHdpdGggdGhpcyBpbiB0aGUgYWJz
ZW5jZSBvZiBhbiBhY3R1YWwNCj4gPj4+PiBuZWVkIHRvIHN1cHBvcnQgdGhlIHRpbWVyIG9uIG5v
bi1GcmVlc2NhbGUgb3BlbnBpYyBpbiBwYXJ0aXRpb25lZA0KPiA+PiBzY2VuYXJpb3MuDQo+ID4+
Pj4gVGhlIGV4aXN0aW5nIG9wZW5waWMgbm9kZSBpcyBzdWZmaWNpZW50IHRvIGRlc2NyaWJlIHRo
ZQ0KPiA+Pj4+IGhhcmR3YXJlIGluIHRoZSBhYnNlbmNlIG9mIHBhcnRpdGlvbmluZy4gICBXZSBj
b3VsZCBoYXZlIGFuDQo+ID4+Pj4gIm9wZW5waWMtbm8tdGltZXIiIHByb3BlcnR5IHRvIGluZGlj
YXRlIHRoYXQgd2UncmUgZGVzY3JpYmluZyBpdA0KPiA+Pj4+IHNlcGFyYXRlbHksIHNvIHRoYXQg
dGhlIGFic2VuY2Ugb2YgYSB0aW1lciBub2RlIGlzbid0IGFtYmlndW91cyBhcw0KPiB0bw0KPiA+
Pj4+IHdoZXRoZXIgaXQncyBhbiBvbGQgdHJlZSBvciBhIHBhcnRpdGlvbmVkIHNjZW5hcmlvLiAg
QW4gZnNsLG1waWMNCj4gPj4+PiBjb21wYXRpYmxlIHdvdWxkIGltcGx5IG9wZW5waWMtbm8tdGlt
ZXIuDQo+ID4+Pj4NCj4gPj4+PiBOb3RlIHRoYXQgSSBiZWxpZXZlIG1hbnkgb2YgdGhlIG5vbi1G
cmVlc2NhbGUgb3BlbnBpYyBub2RlcyBhcmUNCj4gZ29pbmcNCj4gPj4+PiB0byBiZSBmb3VuZCBv
biBzeXN0ZW1zIHdpdGggcmVhbCBPcGVuIEZpcm13YXJlLCBzbyB3ZSBjYW4ndCBnbw0KPiA+Pj4+
IGNoYW5naW5nIHRoZSBkZXZpY2UgdHJlZSBmb3IgdGhlbS4NCj4gPj4+IFtXYW5nIERvbmdzaGVu
Z10gSW4gdGhlIE9wZW4tUElDIHNwZWNpZmljYXRpb24sIHRoZXJlIGFyZSBmb3VyIHRpbWVyLg0K
PiA+Pj4gCQlpbnRlcnJ1cHRzID0gPDAgMCAzIDANCj4gPj4+IAkJCSAgICAgIDEgMCAzIDANCj4g
Pj4+IAkJCSAgICAgIDIgMCAzIDANCj4gPj4+IAkJICAgICAgICAgICAgICAzIDAgMyAwPjsNCj4g
Pj4+DQo+ID4+PiBUaGUgImludGVycnVwdHMiIGp1c3QgbGV0IHVzZXIga25vdyB0aGVyZSBhcmUg
Zm91ciB0aW1lcnMuIFVzYWdlDQo+IGJhc2VkDQo+ID4+ICJpbnRlcnJ1cHRzIg0KPiA+Pj4gYmlu
ZGluZyB0byBjaGFuZ2UgZHRzLg0KPiA+Pg0KPiA+PiBJIGNhbid0IHVuZGVyc3RhbmQgdGhlIGFi
b3ZlIG9yIGhvdyBpdCdzIGEgcmVzcG9uc2UgdG8gd2hhdCBJIHdyb3RlLg0KPiA+Pg0KPiA+IFtX
YW5nIERvbmdzaGVuZ10gSSBtZWFuIHRoaXMganVzdCB0byB0ZWxsIGhvdyBtYW55IHRpbWVycyB0
byBzdXBwb3J0IGluDQo+IE9wZW4tUElDDQo+ID4gc3BlY2lmaWNhdGlvbi4gSWYgc29tZW9uZSBu
ZWVkcyB0byB3cml0ZSAiaW50ZXJydXB0cyIgaW50byBkdHMsIHRoaXMNCj4gbXVzdCBjb21wbHkN
Cj4gPiB3aXRoIHRoZSBzcGVjaWZpY2F0aW9uIG9mIHRoZSBpbnRlcnJ1cHQgdG8gd3JpdGUuIHRo
aXMgaXMgYmFzZWQgb24gdGhlDQo+IHBpYyBkcml2ZXINCj4gPiBzaG91bGQgYmUgY2hhbmdlZCBp
biBkaWZmZXJlbnQgcGxhdGZvcm1zLg0KPiANCj4gTXkgcG9pbnQgKGJleW9uZCB0aGF0IGV4YW1w
bGVzIHByb3ZpZGVkIHNob3VsZCBiZSB2YWxpZCBmb3IgKnNvbWUqDQo+IHN5c3RlbSkgaXMgdGhl
cmUgaXMgbm8gdmFsaWQgdGhpbmcgdG8gcHV0IGluIHRoZSBpbnRlcnJ1cHRzIHByb3BlcnR5DQo+
IGhlcmUgd2hlbiB0aGUgaW50ZXJydXB0IGNvbnRyb2xsZXIgaXMgbm90ICJmc2wsbXBpYyIsIHNv
IHRoaXMgZG9lc24ndA0KPiB3b3JrLg0KPiANCltXYW5nIERvbmdzaGVuZ10gRmluZSwgSSB3aWxs
IHJlbW92ZSB0aGlzIGRvY3VtZW50IG9mIE9wZW4tUElDIGdsb2JhbCB0aW1lci4NCldlIG9ubHkg
c3VwcG9ydCBtcGljIHRpbWVyLiBEcml2ZXIgd2lsbCBiZSBjb21wYXRpYmxlIHdpdGggT1BFTi1Q
SUMNCnNwZWNpZmljYXRpb24uIExldCBzb21lb25lIHdobyBjYXJlcyBhYm91dCBvcmRpbmFyeSBP
cGVuUElDIGRyaXZlcnMgYWRkDQpzdXBwb3J0Pw0KDQo+IC1TY290dA0KDQo=