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Fri, 10 Feb 2023 00:45:18 GMT Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C64262004D; Fri, 10 Feb 2023 00:45:18 +0000 (GMT) Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C023F20040; Fri, 10 Feb 2023 00:45:17 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by smtpav06.fra02v.mail.ibm.com (Postfix) with ESMTP; Fri, 10 Feb 2023 00:45:17 +0000 (GMT) Received: from [10.61.2.107] (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 806C860394; Fri, 10 Feb 2023 11:45:12 +1100 (AEDT) Message-ID: <50d7c326e1eb65e996ee1a99139e4b50c06fadb3.camel@linux.ibm.com> Subject: Re: [PATCH 1/3] powerpc/code-patching: Add generic memory patching From: Benjamin Gray To: Christophe Leroy , "linuxppc-dev@lists.ozlabs.org" Date: Fri, 10 Feb 2023 11:45:12 +1100 In-Reply-To: <39ef8e60-679e-a244-8273-67e50671e513@csgroup.eu> References: <20230207015643.590684-1-bgray@linux.ibm.com> <20230207015643.590684-2-bgray@linux.ibm.com> <39ef8e60-679e-a244-8273-67e50671e513@csgroup.eu> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.46.3 (3.46.3-1.fc37) MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: WFsX1mSZj6mGWE9ppsYi5m4URfPJ5nnz X-Proofpoint-ORIG-GUID: 7mf6Onqw3xxDYOo8Awv0vjpfaeQawwQd X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.170.22 definitions=2023-02-09_16,2023-02-09_03,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 spamscore=0 phishscore=0 adultscore=0 lowpriorityscore=0 mlxlogscore=999 malwarescore=0 impostorscore=0 bulkscore=0 priorityscore=1501 suspectscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2302100002 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "erhard_f@mailbox.org" , "npiggin@gmail.com" Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Thu, 2023-02-09 at 07:15 +0000, Christophe Leroy wrote: > > +static inline int patch_uint(u32 *addr, unsigned int val) > > +{ > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0return patch_instruction(add= r, ppc_inst(val)); >=20 > Would it make more sense that patch_instruction() calls patch_uint()=20 > instead of the reverse ? >=20 That's what I had originally, but I figured it would be nicer to see 'patch_instruction' in the disassembly given it's still the main usage. It's equivalent otherwise though. > > diff --git a/arch/powerpc/lib/code-patching.c > > b/arch/powerpc/lib/code-patching.c > > index b00112d7ad46..0f7e9949faf0 100644 > > --- a/arch/powerpc/lib/code-patching.c > > +++ b/arch/powerpc/lib/code-patching.c > > @@ -20,16 +20,14 @@ > > =C2=A0 #include > > =C2=A0 #include > > =C2=A0=20 > > -static int __patch_instruction(u32 *exec_addr, ppc_inst_t instr, > > u32 *patch_addr) > > +static int __patch_memory(void *exec_addr, unsigned long val, void > > *patch_addr, > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= bool is_dword) > > =C2=A0 { > > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0if (!ppc_inst_prefixed(instr= )) { > > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0u32 val =3D ppc_inst_val(instr); > > - > > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0__put_kernel_nofault(patch_addr, &val, u32, > > failed); > > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0} else { > > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0u64 val =3D ppc_inst_as_ulong(instr); > > - > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0if (IS_ENABLED(CONFIG_PPC64)= && unlikely(is_dword)) { > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0__put_kernel_nofault(patch_addr, &val, u64, > > failed); > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0} else { > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0unsigned int val32 =3D val; >=20 > Why unsigned int and not u32 as before ? >=20 No particular reason, I just tend to use int/long over 32/64 in code compiled on 32 bit as well and there was a long period of time between removing the original vars and fixing the big endian issue. > > +#ifdef CONFIG_PPC64 > > + > > +int patch_instruction(u32 *addr, ppc_inst_t instr) > > +{ > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0if (ppc_inst_prefixed(instr)= ) > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0return patch_memory(addr, ppc_inst_as_ulong(instr), > > true); > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0else > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0return patch_memory(addr, ppc_inst_val(instr), > > false); > > +} > > +NOKPROBE_SYMBOL(patch_instruction) > > + > > +int patch_uint(void *addr, unsigned int val) > > +{ > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0return patch_memory(addr, va= l, false); > > +} > > +NOKPROBE_SYMBOL(patch_uint) > > + > > +int patch_ulong(void *addr, unsigned long val) > > +{ > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0return patch_memory(addr, va= l, true); > > +} > > +NOKPROBE_SYMBOL(patch_ulong) > > + > > +#else > > + > > +noinline int patch_instruction(u32 *addr, ppc_inst_t instr) > > +{ > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0return patch_memory(addr, pp= c_inst_val(instr), false); > > +} >=20 > A comment explaining the reason for the noinline would be welcome > here. Yeah makes sense > By the way, would the noinline change anything on PPC64 ? If not we=20 > could have a common function as ppc_inst_prefixed() constant folds to > false in PPC32. On ppc64 that prevents patch_branch() from calling patch_memory() directly with is_dword=3Dfalse.