linuxppc-dev.lists.ozlabs.org archive mirror
 help / color / mirror / Atom feed
From: Mike Qiu <qiudayu@linux.vnet.ibm.com>
To: Gavin Shan <shangw@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH 05/31] powerpc/eeh: Trace PCI bus from PE
Date: Wed, 19 Jun 2013 15:21:07 +0800	[thread overview]
Message-ID: <51C15BE3.70906@linux.vnet.ibm.com> (raw)
In-Reply-To: <1371544435-4943-6-git-send-email-shangw@linux.vnet.ibm.com>

于 2013/6/18 16:33, Gavin Shan 写道:
> There're several types of PEs can be supported for now: PHB, Bus
> and Device dependent PE. For PCI bus dependent PE, tracing the
> corresponding PCI bus from PE (struct eeh_pe) would make the code
> more efficient. The patch also enables the retrieval of PCI bus based
> on the PCI bus dependent PE.
>
> Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
> ---
>   arch/powerpc/include/asm/eeh.h |    1 +
>   arch/powerpc/kernel/eeh_pe.c   |   22 ++++++++++++++++++++++
>   2 files changed, 23 insertions(+), 0 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
> index acdfcaa..f3b49d6 100644
> --- a/arch/powerpc/include/asm/eeh.h
> +++ b/arch/powerpc/include/asm/eeh.h
> @@ -59,6 +59,7 @@ struct eeh_pe {
>   	int config_addr;		/* Traditional PCI address	*/
>   	int addr;			/* PE configuration address	*/
>   	struct pci_controller *phb;	/* Associated PHB		*/
> +	struct pci_bus *bus;		/* Top PCI bus for bus PE	*/
>   	int check_count;		/* Times of ignored error	*/
>   	int freeze_count;		/* Times of froze up		*/
>   	int false_positives;		/* Times of reported #ff's	*/
> diff --git a/arch/powerpc/kernel/eeh_pe.c b/arch/powerpc/kernel/eeh_pe.c
> index 3d2dcf5..5bd1637 100644
> --- a/arch/powerpc/kernel/eeh_pe.c
> +++ b/arch/powerpc/kernel/eeh_pe.c
> @@ -304,6 +304,7 @@ static struct eeh_pe *eeh_pe_get_parent(struct eeh_dev *edev)
>   int eeh_add_to_parent_pe(struct eeh_dev *edev)
>   {
>   	struct eeh_pe *pe, *parent;
> +	struct eeh_dev *first_edev;
>
>   	eeh_lock();
>
> @@ -326,6 +327,21 @@ int eeh_add_to_parent_pe(struct eeh_dev *edev)
>   		pe->type = EEH_PE_BUS;
>   		edev->pe = pe;
>
> +		/*
> +		 * For PCI bus sensitive PE, we can reset the parent
> +		 * bridge in order for hot-reset. However, the PCI
> +		 * devices including the associated EEH devices might
> +		 * be removed when EEH core is doing recovery. So that
> +		 * won't safe to retrieve the bridge through downstream
> +		 * EEH device. We have to trace the parent PCI bus, then
> +		 * the parent bridge explicitly.
> +		 */
> +		if (eeh_probe_mode_dev() && !pe->bus) {
> +			first_edev = list_first_entry(&pe->edevs,
> +						      struct eeh_dev, list);
> +			pe->bus = eeh_dev_to_pci_dev(first_edev)->bus;
> +		}
Hi Gavin

I have qestion, can we keep pe->bus for a device pe ? the value is the 
bus which edev belongs to.

so that we can make the code more efficient for device pe.

I have no idea of whether this will cause side effect

Thanks
Mike
> +
>   		/* Put the edev to PE */
>   		list_add_tail(&edev->list, &pe->edevs);
>   		eeh_unlock();
> @@ -641,12 +657,18 @@ struct pci_bus *eeh_pe_bus_get(struct eeh_pe *pe)
>   		bus = pe->phb->bus;
>   	} else if (pe->type & EEH_PE_BUS ||
>   		   pe->type & EEH_PE_DEVICE) {
> +		if (pe->bus) {
> +			bus = pe->bus;
> +			goto out;
> +		}
> +
>   		edev = list_first_entry(&pe->edevs, struct eeh_dev, list);
>   		pdev = eeh_dev_to_pci_dev(edev);
>   		if (pdev)
>   			bus = pdev->bus;
>   	}
>
> +out:
>   	eeh_unlock();
>
>   	return bus;

  reply	other threads:[~2013-06-19  7:21 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-06-18  8:33 [PATCH v5 00/31] EEH Support for PowerNV platform Gavin Shan
2013-06-18  8:33 ` [PATCH 01/31] powerpc/eeh: Move common part to kernel directory Gavin Shan
2013-06-19  3:58   ` Michael Neuling
2013-06-19  6:11     ` Gavin Shan
2013-06-19  6:18       ` Gavin Shan
2013-06-19  7:29   ` Gavin Shan
2013-06-18  8:33 ` [PATCH 02/31] powerpc/eeh: Cleanup for EEH core Gavin Shan
2013-06-19  6:37   ` Gavin Shan
2013-06-18  8:33 ` [PATCH 03/31] powerpc/eeh: Make eeh_phb_pe_get() public Gavin Shan
2013-06-18  8:33 ` [PATCH 04/31] powerpc/eeh: Make eeh_pe_get() public Gavin Shan
2013-06-18  8:33 ` [PATCH 05/31] powerpc/eeh: Trace PCI bus from PE Gavin Shan
2013-06-19  7:21   ` Mike Qiu [this message]
2013-06-19  8:48     ` Gavin Shan
2013-06-19 10:20   ` Gavin Shan
2013-06-18  8:33 ` [PATCH 06/31] powerpc/eeh: Make eeh_init() public Gavin Shan
2013-06-18  8:33 ` [PATCH 07/31] powerpc/eeh: EEH post initialization operation Gavin Shan
2013-06-18  8:33 ` [PATCH 08/31] powerpc/eeh: Refactor eeh_reset_pe_once() Gavin Shan
2013-06-18  8:33 ` [PATCH 09/31] powerpc/eeh: Delay EEH probe during hotplug Gavin Shan
2013-06-18  8:33 ` [PATCH 10/31] powerpc/eeh: Single kthread to handle events Gavin Shan
2013-06-18  8:33 ` [PATCH 11/31] powerpc/eeh: Trace time on first error for PE Gavin Shan
2013-06-18  8:33 ` [PATCH 12/31] powerpc/eeh: Allow to purge EEH events Gavin Shan
2013-06-18  8:33 ` [PATCH 13/31] powerpc/eeh: Export confirm_error_lock Gavin Shan
2013-06-18  8:33 ` [PATCH 14/31] powerpc/eeh: EEH core to handle special event Gavin Shan
2013-06-19  6:19   ` Gavin Shan
2013-06-18  8:33 ` [PATCH 15/31] powerpc/eeh: Sync OPAL API with firmware Gavin Shan
2013-06-18  8:33 ` [PATCH 16/31] powerpc/eeh: EEH backend for P7IOC Gavin Shan
2013-06-18  8:33 ` [PATCH 17/31] powerpc/eeh: I/O chip post initialization Gavin Shan
2013-06-18  8:33 ` [PATCH 18/31] powerpc/eeh: I/O chip EEH enable option Gavin Shan
2013-06-18  8:33 ` [PATCH 19/31] powerpc/eeh: I/O chip EEH state retrieval Gavin Shan
2013-06-18  8:33 ` [PATCH 20/31] powerpc/eeh: I/O chip PE reset Gavin Shan
2013-06-18  8:33 ` [PATCH 21/31] powerpc/eeh: I/O chip PE log and bridge setup Gavin Shan
2013-06-18  8:33 ` [PATCH 22/31] powerpc/eeh: I/O chip next error Gavin Shan
2013-06-18  8:33 ` [PATCH 23/31] powerpc/eeh: PowerNV EEH backends Gavin Shan
2013-06-18  8:33 ` [PATCH 24/31] powerpc/eeh: Initialization for PowerNV Gavin Shan
2013-06-18  8:33 ` [PATCH 25/31] powerpc/eeh: Enable EEH check for config access Gavin Shan
2013-06-18  8:33 ` [PATCH 26/31] powerpc/eeh: Allow to check fenced PHB proactively Gavin Shan
2013-06-18  8:33 ` [PATCH 27/31] powernv/opal: Notifier for OPAL events Gavin Shan
2013-06-18  8:33 ` [PATCH 28/31] powernv/opal: Disable OPAL notifier upon poweroff Gavin Shan
2013-06-18  8:33 ` [PATCH 29/31] powerpc/eeh: Register OPAL notifier for PCI error Gavin Shan
2013-06-18  8:33 ` [PATCH 30/31] powerpc/powernv: Debugfs directory for PHB Gavin Shan
2013-06-18  8:33 ` [PATCH 31/31] powerpc/eeh: Debugfs for error injection Gavin Shan
2013-06-18  8:41 ` [PATCH v5 00/31] EEH Support for PowerNV platform Gavin Shan
  -- strict thread matches above, loose matches on Subject: below --
2013-06-20  5:20 [PATCH v6 " Gavin Shan
2013-06-20  5:20 ` [PATCH 05/31] powerpc/eeh: Trace PCI bus from PE Gavin Shan

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=51C15BE3.70906@linux.vnet.ibm.com \
    --to=qiudayu@linux.vnet.ibm.com \
    --cc=linuxppc-dev@lists.ozlabs.org \
    --cc=shangw@linux.vnet.ibm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).