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Date: Wed, 26 Jun 2013 15:28:46 +0530
From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
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To: Michael Ellerman <michael@ellerman.id.au>
Subject: Re: [PATCH 8/8] powerpc/perf: Add power8 EBB support
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Cc: linuxppc-dev@ozlabs.org, sukadev@linux.vnet.ibm.com,
 Paul Mackerras <paulus@samba.org>
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> @@ -117,6 +117,7 @@
>  	 (EVENT_UNIT_MASK      << EVENT_UNIT_SHIFT)		|	\
>  	 (EVENT_COMBINE_MASK   << EVENT_COMBINE_SHIFT)		|	\
>  	 (EVENT_MARKED_MASK    << EVENT_MARKED_SHIFT)		|	\
> +	 (1ull		       << EVENT_CONFIG_EBB_SHIFT)	|	\

We should define this macro like EVENT_MARKED_MASK

#define EVENT_EBB_MASK       0x1

Numeric value of "1ull" stands out odd in the scheme.


>  	  EVENT_PSEL_MASK)
> 
> + *              EBB -*    |                     |
> + *                        |                     |      Count of events for each PMC.
> + *      L1 I/D qualifier -*                     |        p1, p2, p3, p4, p5, p6.
>   *                     nc - number of counters -*
>   *
>   * The PMC fields P1..P6, and NC, are adder fields. As we accumulate constraints
> @@ -159,6 +160,9 @@
>  #define CNST_THRESH_VAL(v)	(((v) & EVENT_THRESH_MASK) << 32)
>  #define CNST_THRESH_MASK	CNST_THRESH_VAL(EVENT_THRESH_MASK)
> 
> +#define CNST_EBB_VAL(v)		(((v) & 1) << 24)

EVENT_EBB_MASK can be used here as well.