Linux for ml310

Linux for ml310

[Joachim Meyer]

Hi

I'm trying to run a Linux System on a ml310
I'm using the Kernel 2.4.26 from Bitkeeper und and EDK9.1 Sp2
I can compile my Kernel without Errors, with a Crosscompiler made by crosstools, if I don't copy the BSP files in the Kernel Directory.
If I do so, I can't compile. It aborts with the error:
serial.c:4040: error: 'XPAR_UARTNS550_0_CLOCK_FREQ_HZ' undeclared (first use in this function)
If I don't use the UART in my Kernel config I get other errors like:
adapter.c:96: error: `XPAR_XEMAC_NUM_INSTANCES' undeclared (first use in this function)
I don't really know what to do now. Where should I look for the solution?
Did I something wrong by generating the BSP or do I have to use an older version of the edk/ise?

When I was trying to find a solution I read some of the things in this mailing list, and now I'm concered about these 2 points
-Board
-Kernel Version
Is it a good idea to use the ml310?
I want a Linux, an ethernet device, a RS232 device and system-ace. Later I would try to patch the Linux with rtai for real-time-support.
I read about troubles with the ethernet device on the ml310 because of troubles with the pci bus. Would it be much easier to use an XUP-Board?
Would it be easier to use the kernel 2.6.x? Has anybody experience in running an rtai-patched Linux on an ml310 - bzw XUP Board?

Greetings & THX Joachim
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Re: Linux for ml310

[Grant Likely]

On 1/7/08, Joachim Meyer <Jogi95@web.de> wrote:
> Hi
>
> I'm trying to run a Linux System on a ml310
> I'm using the Kernel 2.4.26 from Bitkeeper und and EDK9.1 Sp2
> I can compile my Kernel without Errors, with a Crosscompiler made by crosstools, if I don't copy the BSP files in the Kernel Directory.
> If I do so, I can't compile. It aborts with the error:
> serial.c:4040: error: 'XPAR_UARTNS550_0_CLOCK_FREQ_HZ' undeclared (first use in this function)
> If I don't use the UART in my Kernel config I get other errors like:
> adapter.c:96: error: `XPAR_XEMAC_NUM_INSTANCES' undeclared (first use in this function)
> I don't really know what to do now. Where should I look for the solution?

Applying the BSP to the 2.4 kernel is a error prone process.  You need
to be using the *exact* version of the MontaVista kernel that EDK is
expecting, otherwise it breaks and you need to fix it up manually.
2.6 is much better and you don't need to copy over the whole BSP; just
the xparameters.h file.

> Did I something wrong by generating the BSP or do I have to use an older version of the edk/ise?
>
> When I was trying to find a solution I read some of the things in this mailing list, and now I'm concered about these 2 points
> -Board
> -Kernel Version
> Is it a good idea to use the ml310?
> I want a Linux, an ethernet device, a RS232 device and system-ace. Later I would try to patch the Linux with rtai for real-time-support.
> I read about troubles with the ethernet device on the ml310 because of troubles with the pci bus. Would it be much easier to use an XUP-Board?
> Would it be easier to use the kernel 2.6.x? Has anybody experience in running an rtai-patched Linux on an ml310 - bzw XUP Board?

I strongly recommend moving to 2.6.  I don't know if anyone has got
rtai going on it for the virtex, but your chances of getting help are
much higher because virtex 2.6 support is being actively developed.

As for the XUP board, I haven't had a chance to get mine running yet,
but I know others have had good success with it.

Cheers,
g.


-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195

Re: Linux for ml310

[Joachim Meyer]

Hi

First I want to thank you for you fast and useful answer last time.
I decided to use the kernel 2.6 for my ml310 now.

I downloaded this Kernel:
http://git.secretlab.ca/git/gitweb.cgi=3Fp=3Dlinux-2.6-virtex.git;a=3Dsnapshot;h=
=3Dd7ed933b578d9c4dec0e23a5a6f78c464b31c47c;sf=3Dtbz2
Is this a complete Kernel=3F I don't really understand this whole git-tree s=
tuff.
then i copied the arch/ppc/configs/ml300=5Fdefconfig to .config.
I used an edk9.1 with linux=5F2=5F6 as OS for the ppc405=5F0,  0x10000000 for me=
mory size, 100000000 for uart16550 bus clock freq and set the target direc=
tory. Under connected=5Fperiphs where: RS232=5FUart, SPI=5FEEPROM, PCI32=5FBRIDGE,=
 SysACE=5FCompactFlash and opb=5Fintc=5F0.
At Software I pressed the "Generate Libaries and BSPs" Button and copied t=
he generated xparameters.h to linux-2.6-virtex/arch/ppc/platforms/4xx/xpar=
ameters.
I tried to compile with=20
make ARCH=3Dppc CROSS=5FCOMPILE=3Dpowerpc-405-linux-gnu- zImage
but it soon aborted with:
---------------------------
  CHK     include/linux/version.h
  CHK     include/linux/utsrelease.h
  CALL    scripts/checksyscalls.sh
  CHK     include/linux/compile.h
  CC      arch/ppc/syslib/xilinx=5Fpic.o
In file included from arch/ppc/syslib/xilinx=5Fpic.c:16:
arch/ppc/platforms/4xx/xparameters/xparameters.h:14:26: linux/config.h: No=
 such file or directory
make[1]: *** [arch/ppc/syslib/xilinx=5Fpic.o] Error 1
make: *** [arch/ppc/syslib] Error 2
------------------------------

Can you help me=3F
Is there any tutorial (beside http://wiki.secretlab.ca/index.php/Linux=5Fon=5F=
Xilinx=5FVirtex) which provides detailed information=3F
Which Kernel should I use (And where to get it)=3F
Are ther eany patches necessary=3F
As crosscompiler I used crosstool with:
eval `cat powerpc-405.dat gcc-4.1.0-glibc-2.3.6.dat` sh all.sh --notest

I hope I don't bother you too much
Greetings & Thanks
Joachim
=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F
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Re: Linux for ml310

[Grant Likely]

On 1/9/08, Joachim Meyer <Jogi95@web.de> wrote:
> Hi
>
http://git.secretlab.ca/git/gitweb.cgi?p=linux-2.6-virtex.git;a=snapshot;h=d7ed933b578d9c4dec0e23a5a6f78c464b31c47c;sf=tbz2
> Is this a complete Kernel? I don't really understand this whole git-tree stuff.
> then i copied the arch/ppc/configs/ml300_defconfig to .config.

Hint: this does the same thing,
$ ARCH=ppc make ml300_defconfig

> I used an edk9.1 with linux_2_6 as OS for the ppc405_0,  0x10000000 for memory size, 100000000 for uart16550 bus clock freq and set the target directory. Under connected_periphs where: RS232_Uart, SPI_EEPROM, PCI32_BRIDGE, SysACE_CompactFlash and opb_intc_0.
> At Software I pressed the "Generate Libaries and BSPs" Button and copied the generated xparameters.h to linux-2.6-virtex/arch/ppc/platforms/4xx/xparameters.

you want to copy xparameter_ml???.h to arch/ppc/platform/4xx/xparameters_ml300.h

Do not replace xparameter.h; it's a wrapper around the real xparams
file and it defines things that Linux needs.

Cheers,
g.

-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

Re: Linux for ml310

[Grant Likely]

always CC the mailing list when replying.

On 1/9/08, Joachim Meyer <Jogi95@web.de> wrote:
> arch/ppc/boot/common/ns16550.c:21: error: `XPAR_UARTNS550_0_CLOCK_FREQ_HZ' undeclared here (not in a function)
> arch/ppc/boot/common/ns16550.c:21: error: initializer element is not constant
> arch/ppc/boot/common/ns16550.c:21: error: (near initialization for `rs_table[0].baud_base')
> arch/ppc/boot/common/ns16550.c:21: error: `XPAR_INTC_0_UARTNS550_0_VEC_ID' undeclared here (not in a function)
> arch/ppc/boot/common/ns16550.c:21: error: initializer element is not constant
> arch/ppc/boot/common/ns16550.c:21: error: (near initialization for `rs_table[0].irq')
> arch/ppc/boot/common/ns16550.c:21: error: `XPAR_UARTNS550_0_BASEADDR' undeclared here (not in a function)
> arch/ppc/boot/common/ns16550.c:21: error: initializer element is not constant
> arch/ppc/boot/common/ns16550.c:21: error: (near initialization for `rs_table[0].iomem_base')
> arch/ppc/boot/common/ns16550.c:21: error: initializer element is not constant
> arch/ppc/boot/common/ns16550.c:21: error: (near initialization for `rs_table[0]'

You're xparameters_ml300.h file does not define
`XPAR_UARTNS550_0_CLOCK_FREQ_HZ', `XPAR_INTC_0_UARTNS550_0_VEC_ID' and
`XPAR_UARTNS550_0_BASEADDR'.

You'll need to look in your xparams file, find out what the real
#defines are for the uart and add fixups to xparameter.h so ns16550
can find them.

You're almost there!  :-)

g.

-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

Re: Linux for ml310

[Joachim Meyer]

Hi again

In which xparams* files should i look for the right definition=3F
In the xparameters.h from the BSP I can't find it, it looks like this:
-------------------------------------------------------------------
/*
 * include/asm-ppc/xparameters.h
 *
 * This file includes the correct xparameters.h for the CONFIG'ed board
 *
 * Author: MontaVista Software, Inc.
 *         source@mvista.com
 *
 * 2004 (c) MontaVista Software, Inc.  This file is licensed under the ter=
ms
 * of the GNU General Public License version 2.  This program is licensed
 * "as is" without any warranty of any kind, whether express or implied.
 */

#include <linux/config.h>

#if defined(CONFIG=5FXILINX=5FML300)
#include <platforms/4xx/xparameters/xparameters=5Fml300.h>
#endif
#if defined(CONFIG=5FXILINX=5FML40x)
#include <platforms/4xx/xparameters/xparameters=5Fml40x.h>
#endif
#if defined(CONFIG=5FMEMEC=5F2VPX)
#include <platforms/4xx/xparameters/xparameters=5F2vpx.h>
#endif

/*
 * A few reasonable defaults for the #defines which could be missing depen=
ding
 * on the IP version or variant (e.g. OPB vs PLB)
 */

#ifndef XPAR=5FEMAC=5F0=5FCAM=5FEXIST
#define XPAR=5FEMAC=5F0=5FCAM=5FEXIST 0
#endif
#ifndef XPAR=5FEMAC=5F0=5FJUMBO=5FEXIST
#define XPAR=5FEMAC=5F0=5FJUMBO=5FEXIST 0
#endif
#ifndef XPAR=5FEMAC=5F0=5FTX=5FDRE=5FTYPE
#define XPAR=5FEMAC=5F0=5FTX=5FDRE=5FTYPE 0
#endif
#ifndef XPAR=5FEMAC=5F0=5FRX=5FDRE=5FTYPE
#define XPAR=5FEMAC=5F0=5FRX=5FDRE=5FTYPE 0
#endif
#ifndef XPAR=5FEMAC=5F0=5FTX=5FINCLUDE=5FCSUM
#define XPAR=5FEMAC=5F0=5FTX=5FINCLUDE=5FCSUM 0
#endif
#ifndef XPAR=5FEMAC=5F0=5FRX=5FINCLUDE=5FCSUM
#define XPAR=5FEMAC=5F0=5FRX=5FINCLUDE=5FCSUM 0
#endif

#ifndef XPAR=5FEMAC=5F1=5FCAM=5FEXIST
#define XPAR=5FEMAC=5F1=5FCAM=5FEXIST 0
#endif
#ifndef XPAR=5FEMAC=5F1=5FJUMBO=5FEXIST
#define XPAR=5FEMAC=5F1=5FJUMBO=5FEXIST 0
#endif
#ifndef XPAR=5FEMAC=5F1=5FTX=5FDRE=5FTYPE
#define XPAR=5FEMAC=5F1=5FTX=5FDRE=5FTYPE 0
#endif
#ifndef XPAR=5FEMAC=5F1=5FRX=5FDRE=5FTYPE
#define XPAR=5FEMAC=5F1=5FRX=5FDRE=5FTYPE 0
#endif
#ifndef XPAR=5FEMAC=5F1=5FTX=5FINCLUDE=5FCSUM
#define XPAR=5FEMAC=5F1=5FTX=5FINCLUDE=5FCSUM 0
#endif
#ifndef XPAR=5FEMAC=5F1=5FRX=5FINCLUDE=5FCSUM
#define XPAR=5FEMAC=5F1=5FRX=5FINCLUDE=5FCSUM 0
#endif

#ifndef XPAR=5FGPIO=5F0=5FIS=5FDUAL
#define XPAR=5FGPIO=5F0=5FIS=5FDUAL 0
#endif
#ifndef XPAR=5FGPIO=5F1=5FIS=5FDUAL
#define XPAR=5FGPIO=5F1=5FIS=5FDUAL 0
#endif
#ifndef XPAR=5FGPIO=5F2=5FIS=5FDUAL
#define XPAR=5FGPIO=5F2=5FIS=5FDUAL 0
#endif
#ifndef XPAR=5FGPIO=5F3=5FIS=5FDUAL
#define XPAR=5FGPIO=5F3=5FIS=5FDUAL 0
#endif
#ifndef XPAR=5FGPIO=5F4=5FIS=5FDUAL
#define XPAR=5FGPIO=5F4=5FIS=5FDUAL 0
#endif
----------------------------------------------------

Did I something wrong in the edk Projekt, or are there other xparameters w=
here I must look=3F
Greetings & THX
=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F
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Re: Linux for ml310

[Grant Likely]

On 1/9/08, Joachim Meyer <Jogi95@web.de> wrote:
> Hi again
>
> In which xparams* files should i look for the right definition?
> In the xparameters.h from the BSP I can't find it, it looks like this:
> -------------------------------------------------------------------
> /*
>  * include/asm-ppc/xparameters.h
>  *
>  * This file includes the correct xparameters.h for the CONFIG'ed board
>  *
>  * Author: MontaVista Software, Inc.
>  *         source@mvista.com
>  *
>  * 2004 (c) MontaVista Software, Inc.  This file is licensed under the terms
>  * of the GNU General Public License version 2.  This program is licensed
>  * "as is" without any warranty of any kind, whether express or implied.
>  */
>
> #include <linux/config.h>
>
> #if defined(CONFIG_XILINX_ML300)
> #include <platforms/4xx/xparameters/xparameters_ml300.h>

<--- Add fixups here.

> #endif
> #if defined(CONFIG_XILINX_ML40x)
> #include <platforms/4xx/xparameters/xparameters_ml40x.h>
> #endif

The fixups should look like this:

#define XPAR_UARTNS550_0_CLOCK_FREQ_HZ \
                XPAR_<real-name-from-xparams-ml300>_FREQ_HZ
#define XPAR_INTC_0_UARTNS550_0_VEC_ID \
                XPAR_<real-name-from-xparams-ml300>_VEC_ID
#define XPAR_UARTNS550_0_BASEADDR \
                XPAR_<real-name-from-xparams-ml300>_BASEADDR

Note: when you generate the EDK bsp, *make sure* you generated it for
the "linux 2.6" target; not "standalone".  If you don't then
xparams_ml300 will be missing stuff.

Re: Linux for ml310

[Joachim Meyer]

Hi

Thanks for your great help!
I added following lines which I found at the old xparameters=5Fml300.h, whic=
h was part of the kernel-sources but was replaced with the one of the BSP:=

--------------------------------------------------------------------------=
--------------------------------------------------------
#define XPAR=5FXUARTNS550=5FCLOCK=5FHZ 100000000
#define XPAR=5FDCR=5FINTC=5F0=5FOPB=5FUART16550=5F0=5FIP2INTC=5FIRPT=5FINTR 6
#define XPAR=5FOPB=5FUART16550=5F0=5FBASEADDR 0xA0000000
#define XPAR=5FUARTNS550=5F0=5FCLOCK=5FFREQ=5FHZ XPAR=5FXUARTNS550=5FCLOCK=5FHZ
#define XPAR=5FINTC=5F0=5FUARTNS550=5F0=5FVEC=5FID XPAR=5FDCR=5FINTC=5F0=5FOPB=5FUART16550=5F0=5FIP2=
INTC=5FIRPT=5FINTR
#define XPAR=5FUARTNS550=5F0=5FBASEADDR (XPAR=5FOPB=5FUART16550=5F0=5FBASEADDR+0x1000)
--------------------------------------------------------------------------=
--------------------------------------------------------
now  the compiling ends successfully.
Thanks again
Joachim
=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F
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Re: Linux for ml310

[Grant Likely]

On 1/9/08, Joachim Meyer <Jogi95@web.de> wrote:
> Hi
>
> Thanks for your great help!
> I added following lines which I found at the old xparameters_ml300.h, which was part of the kernel-sources but was replaced with the one of the BSP:
> ----------------------------------------------------------------------------------------------------------------------------------
> #define XPAR_XUARTNS550_CLOCK_HZ 100000000
> #define XPAR_DCR_INTC_0_OPB_UART16550_0_IP2INTC_IRPT_INTR 6
> #define XPAR_OPB_UART16550_0_BASEADDR 0xA0000000
> #define XPAR_UARTNS550_0_CLOCK_FREQ_HZ XPAR_XUARTNS550_CLOCK_HZ
> #define XPAR_INTC_0_UARTNS550_0_VEC_ID XPAR_DCR_INTC_0_OPB_UART16550_0_IP2INTC_IRPT_INTR
> #define XPAR_UARTNS550_0_BASEADDR (XPAR_OPB_UART16550_0_BASEADDR+0x1000)

wait... Are you using the value from the *old* or *new*
xparameters_ml300.h?  The values from the old file *will* *not* *work*
for your design.  You must find the appropriate values from your new
xparams file.

Hmmm.... but, this whole discussion assmues that your using a 16550
serial port.  If you are using the uartlite instead then all of the
above is unnecessary; you just need to turn off 16550 console support
in the kernel config.

Cheers,
g.

-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

Re: Linux for ml310

[Joachim Meyer]

Hi 

I switched "Xilinx uartlite serieal port support" and "Support for console on Xilinxuartlite serialport" on and "8250/16550 and compatible serial support" off, in the kernel config.
Then I removed the things I added in the xparameters.h and compiled successfully.
But I have yet a few Questions:

- What would you recommend to use? UART-Lite or a 16550 serial port. Can I get a console running on the RS232 Port of the Board with both possibilities?

- Can you recommend anything for my next steps to get an running linux (rootfs usw.)? So far I oriented myself on the Klingauf page, but I think it is perhaps not the best one because its too old and some things will probably not work the way he did it anymore.

Greez & Thanks
Joachim
_________________________________________________________________________
In 5 Schritten zur eigenen Homepage. Jetzt Domain sichern und gestalten! 
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Re: Linux for ml310

[Grant Likely]

On 1/9/08, Joachim Meyer <Jogi95@web.de> wrote:
> Hi
>
> I switched "Xilinx uartlite serieal port support" and "Support for console on Xilinxuartlite serialport" on and "8250/16550 and compatible serial support" off, in the kernel config.
> Then I removed the things I added in the xparameters.h and compiled successfully.
> But I have yet a few Questions:
>
> - What would you recommend to use? UART-Lite or a 16550 serial port. Can I get a console running on the RS232 Port of the Board with both possibilities?

if you don't need to change the baud rate at runtime then use the uartlite.

Console works on both.

>
> - Can you recommend anything for my next steps to get an running linux (rootfs usw.)? So far I oriented myself on the Klingauf page, but I think it is perhaps not the best one because its too old and some things will probably not work the way he did it anymore.

Use either ELDK or buildroot.  Personally, I'd like to be using
OpenEmbedded, but I haven't been successful with that yet.

Cheers,
g.

-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

Re: Linux for ml310

[Joachim Meyer]

Hi again

I tried my compiled kernel this morning.
I loaded my Bitstream onto the FPGA, then the zImage.elf via xmd: dow zIma=
ge.elf.
After I typed "run" I got foolowing message on an Terminal:
------------------------------------------------------------------------
loaded at:     00400000 004F219C
board data at: 004F0120 004F019C
relocated to:  00404048 004040C4
zimage at:     00404E39 004EF931
avail ram:     004F3000 10000000

Linux/PPC load: console=3DttyS0,9600
Uncompressing Linux...done.
Now booting the kernel

------------------------------------------------------------------------
Doesn't look that bad I think. ;)
The Question I have is of course why he stops there.
Is it why He can't find a rootfs=3F
Or would he say this in that case.
I found someone with an similar Problem:
http://lists.ppckernel.org/pipermail/ppckernel/2006-May/000026.html
but I already use the xparameters=5Fml310 from my BSP.
Where must I look for the error=3F
There where some warnings when I compiled the kernel. Is this ok=3F

Greets & THX
Joachim

PS: My xparameters=5Fml310.h
--------------------------------------------------------------------------=
----------------------------------------------
/*******************************************************************
*
* CAUTION: This file is automatically generated by libgen.
* Version: Xilinx EDK 9.1.02 EDK=5FJ=5FSP2.4
* DO NOT EDIT.
*
* Copyright (c) 2005 Xilinx, Inc.  All rights reserved.=20
*=20
* Description: Driver parameters
*
*******************************************************************/

/* Definitions for driver UARTLITE */
#define XPAR=5FXUARTLITE=5FNUM=5FINSTANCES 1

/* Definitions for peripheral RS232=5FUART */
#define XPAR=5FRS232=5FUART=5FBASEADDR 0x40600000
#define XPAR=5FRS232=5FUART=5FHIGHADDR 0x4060FFFF
#define XPAR=5FRS232=5FUART=5FDEVICE=5FID 0
#define XPAR=5FRS232=5FUART=5FBAUDRATE 9600
#define XPAR=5FRS232=5FUART=5FUSE=5FPARITY 0
#define XPAR=5FRS232=5FUART=5FODD=5FPARITY 0
#define XPAR=5FRS232=5FUART=5FDATA=5FBITS 8


/******************************************************************/

/* Definitions for driver SPI */
#define XPAR=5FXSPI=5FNUM=5FINSTANCES 1

/* Definitions for peripheral SPI=5FEEPROM */
#define XPAR=5FSPI=5FEEPROM=5FBASEADDR 0x4B308000
#define XPAR=5FSPI=5FEEPROM=5FHIGHADDR 0x4B30807F
#define XPAR=5FSPI=5FEEPROM=5FDEVICE=5FID 0
#define XPAR=5FSPI=5FEEPROM=5FFIFO=5FEXIST 1
#define XPAR=5FSPI=5FEEPROM=5FSPI=5FSLAVE=5FONLY 0
#define XPAR=5FSPI=5FEEPROM=5FNUM=5FSS=5FBITS 1


/******************************************************************/

/* Definitions for driver PCI */
#define XPAR=5FXPCI=5FNUM=5FINSTANCES 1

/* Definitions for peripheral PCI32=5FBRIDGE */
#define XPAR=5FPCI32=5FBRIDGE=5FDEVICE=5FID 0
#define XPAR=5FPCI32=5FBRIDGE=5FBASEADDR 0x42600000
#define XPAR=5FPCI32=5FBRIDGE=5FHIGHADDR 0x4260FFFF
#define XPAR=5FPCI32=5FBRIDGE=5FPCIBAR=5F0 0x00000000
#define XPAR=5FPCI32=5FBRIDGE=5FPCIBAR=5FLEN=5F0 7
#define XPAR=5FPCI32=5FBRIDGE=5FPCIBAR2IPIF=5F0 0
#define XPAR=5FPCI32=5FBRIDGE=5FPCIBAR=5FENDIAN=5FTRANSLATE=5FEN=5F0 0
#define XPAR=5FPCI32=5FBRIDGE=5FPCI=5FPREFETCH=5F0 1
#define XPAR=5FPCI32=5FBRIDGE=5FPCI=5FSPACETYPE=5F0 1
#define XPAR=5FPCI32=5FBRIDGE=5FPCIBAR=5F1 0xffffffff
#define XPAR=5FPCI32=5FBRIDGE=5FPCIBAR=5FLEN=5F1 20
#define XPAR=5FPCI32=5FBRIDGE=5FPCIBAR2IPIF=5F1 0
#define XPAR=5FPCI32=5FBRIDGE=5FPCIBAR=5FENDIAN=5FTRANSLATE=5FEN=5F1 0
#define XPAR=5FPCI32=5FBRIDGE=5FPCI=5FPREFETCH=5F1 1
#define XPAR=5FPCI32=5FBRIDGE=5FPCI=5FSPACETYPE=5F1 1
#define XPAR=5FPCI32=5FBRIDGE=5FPCIBAR=5F2 0xffffffff
#define XPAR=5FPCI32=5FBRIDGE=5FPCIBAR=5FLEN=5F2 20
#define XPAR=5FPCI32=5FBRIDGE=5FPCIBAR2IPIF=5F2 0
#define XPAR=5FPCI32=5FBRIDGE=5FPCIBAR=5FENDIAN=5FTRANSLATE=5FEN=5F2 0
#define XPAR=5FPCI32=5FBRIDGE=5FPCI=5FPREFETCH=5F2 1
#define XPAR=5FPCI32=5FBRIDGE=5FPCI=5FSPACETYPE=5F2 1
#define XPAR=5FPCI32=5FBRIDGE=5FIPIFBAR=5F0 0x60000000
#define XPAR=5FPCI32=5FBRIDGE=5FIPIF=5FHIGHADDR=5F0 0x7fffffff
#define XPAR=5FPCI32=5FBRIDGE=5FIPIFBAR2PCI=5F0 0
#define XPAR=5FPCI32=5FBRIDGE=5FIPIFBAR=5FENDIAN=5FTRANSLATE=5FEN=5F0 0
#define XPAR=5FPCI32=5FBRIDGE=5FIPIF=5FPREFETCH=5F0 1
#define XPAR=5FPCI32=5FBRIDGE=5FIPIF=5FSPACETYPE=5F0 1
#define XPAR=5FPCI32=5FBRIDGE=5FIPIFBAR=5F1 0x54000000
#define XPAR=5FPCI32=5FBRIDGE=5FIPIF=5FHIGHADDR=5F1 0x57ffffff
#define XPAR=5FPCI32=5FBRIDGE=5FIPIFBAR2PCI=5F1 0
#define XPAR=5FPCI32=5FBRIDGE=5FIPIFBAR=5FENDIAN=5FTRANSLATE=5FEN=5F1 0
#define XPAR=5FPCI32=5FBRIDGE=5FIPIF=5FPREFETCH=5F1 1
#define XPAR=5FPCI32=5FBRIDGE=5FIPIF=5FSPACETYPE=5F1 0
#define XPAR=5FPCI32=5FBRIDGE=5FIPIFBAR=5F2 0xffffffff
#define XPAR=5FPCI32=5FBRIDGE=5FIPIF=5FHIGHADDR=5F2 0x00000000
#define XPAR=5FPCI32=5FBRIDGE=5FIPIFBAR2PCI=5F2 0
#define XPAR=5FPCI32=5FBRIDGE=5FIPIFBAR=5FENDIAN=5FTRANSLATE=5FEN=5F2 0
#define XPAR=5FPCI32=5FBRIDGE=5FIPIF=5FPREFETCH=5F2 1
#define XPAR=5FPCI32=5FBRIDGE=5FIPIF=5FSPACETYPE=5F2 1
#define XPAR=5FPCI32=5FBRIDGE=5FIPIFBAR=5F3 0xffffffff
#define XPAR=5FPCI32=5FBRIDGE=5FIPIF=5FHIGHADDR=5F3 0x00000000
#define XPAR=5FPCI32=5FBRIDGE=5FIPIFBAR2PCI=5F3 0
#define XPAR=5FPCI32=5FBRIDGE=5FIPIFBAR=5FENDIAN=5FTRANSLATE=5FEN=5F3 0
#define XPAR=5FPCI32=5FBRIDGE=5FIPIF=5FPREFETCH=5F3 1
#define XPAR=5FPCI32=5FBRIDGE=5FIPIF=5FSPACETYPE=5F3 1
#define XPAR=5FPCI32=5FBRIDGE=5FIPIFBAR=5F4 0xffffffff
#define XPAR=5FPCI32=5FBRIDGE=5FIPIF=5FHIGHADDR=5F4 0x00000000
#define XPAR=5FPCI32=5FBRIDGE=5FIPIFBAR2PCI=5F4 0
#define XPAR=5FPCI32=5FBRIDGE=5FIPIFBAR=5FENDIAN=5FTRANSLATE=5FEN=5F4 0
#define XPAR=5FPCI32=5FBRIDGE=5FIPIF=5FPREFETCH=5F4 1
#define XPAR=5FPCI32=5FBRIDGE=5FIPIF=5FSPACETYPE=5F4 1
#define XPAR=5FPCI32=5FBRIDGE=5FIPIFBAR=5F5 0xffffffff
#define XPAR=5FPCI32=5FBRIDGE=5FIPIF=5FHIGHADDR=5F5 0x00000000
#define XPAR=5FPCI32=5FBRIDGE=5FIPIFBAR2PCI=5F5 0
#define XPAR=5FPCI32=5FBRIDGE=5FIPIFBAR=5FENDIAN=5FTRANSLATE=5FEN=5F5 0
#define XPAR=5FPCI32=5FBRIDGE=5FIPIF=5FPREFETCH=5F5 1
#define XPAR=5FPCI32=5FBRIDGE=5FIPIF=5FSPACETYPE=5F5 1
#define XPAR=5FPCI32=5FBRIDGE=5FDMA=5FBASEADDR 0xFFFFFFFF
#define XPAR=5FPCI32=5FBRIDGE=5FDMA=5FHIGHADDR 0x00000000
#define XPAR=5FPCI32=5FBRIDGE=5FDMA=5FCHAN=5FTYPE 9
#define XPAR=5FPCI32=5FBRIDGE=5FDMA=5FLENGTH=5FWIDTH 13
#define XPAR=5FPCI32=5FBRIDGE=5FBRIDGE=5FIDSEL=5FADDR=5FBIT 16


/******************************************************************/

#define XPAR=5FXSYSACE=5FMEM=5FWIDTH 8
/* Definitions for driver SYSACE */
#define XPAR=5FXSYSACE=5FNUM=5FINSTANCES 1

/* Definitions for peripheral SYSACE=5FCOMPACTFLASH */
#define XPAR=5FSYSACE=5FCOMPACTFLASH=5FBASEADDR 0x41800000
#define XPAR=5FSYSACE=5FCOMPACTFLASH=5FHIGHADDR 0x4180FFFF
#define XPAR=5FSYSACE=5FCOMPACTFLASH=5FDEVICE=5FID 0
#define XPAR=5FSYSACE=5FCOMPACTFLASH=5FMEM=5FWIDTH 8


/******************************************************************/

#define XPAR=5FINTC=5FMAX=5FNUM=5FINTR=5FINPUTS 12
#define XPAR=5FXINTC=5FHAS=5FIPR 1
#define XPAR=5FXINTC=5FUSE=5FDCR 0
/* Definitions for driver INTC */
#define XPAR=5FXINTC=5FNUM=5FINSTANCES 1

/* Definitions for peripheral OPB=5FINTC=5F0 */
#define XPAR=5FOPB=5FINTC=5F0=5FBASEADDR 0x41200000
#define XPAR=5FOPB=5FINTC=5F0=5FHIGHADDR 0x4120FFFF
#define XPAR=5FOPB=5FINTC=5F0=5FDEVICE=5FID 0
#define XPAR=5FOPB=5FINTC=5F0=5FKIND=5FOF=5FINTR 0x00000C00


/******************************************************************/

#define XPAR=5FINTC=5FSINGLE=5FBASEADDR 0x41200000
#define XPAR=5FINTC=5FSINGLE=5FHIGHADDR 0x4120FFFF
#define XPAR=5FINTC=5FSINGLE=5FDEVICE=5FID XPAR=5FOPB=5FINTC=5F0=5FDEVICE=5FID
#define XPAR=5FSYSTEM=5FFPGA=5F0=5FPCI32=5FBRIDGE=5FPCI=5FSBR=5FINT=5FMASK 0X000001
#define XPAR=5FOPB=5FINTC=5F0=5FSYSTEM=5FFPGA=5F0=5FPCI32=5FBRIDGE=5FPCI=5FSBR=5FINT=5FINTR 0
#define XPAR=5FSYSTEM=5FFPGA=5F0=5FPCI32=5FBRIDGE=5FPCI=5FINTF=5FMASK 0X000002
#define XPAR=5FOPB=5FINTC=5F0=5FSYSTEM=5FFPGA=5F0=5FPCI32=5FBRIDGE=5FPCI=5FINTF=5FINTR 1
#define XPAR=5FSYSTEM=5FFPGA=5F0=5FPCI32=5FBRIDGE=5FPCI=5FINTE=5FMASK 0X000004
#define XPAR=5FOPB=5FINTC=5F0=5FSYSTEM=5FFPGA=5F0=5FPCI32=5FBRIDGE=5FPCI=5FINTE=5FINTR 2
#define XPAR=5FSYSTEM=5FFPGA=5F0=5FPCI32=5FBRIDGE=5FPCI=5FINTD=5FMASK 0X000008
#define XPAR=5FOPB=5FINTC=5F0=5FSYSTEM=5FFPGA=5F0=5FPCI32=5FBRIDGE=5FPCI=5FINTD=5FINTR 3
#define XPAR=5FSYSTEM=5FFPGA=5F0=5FPCI32=5FBRIDGE=5FPCI=5FINTC=5FMASK 0X000010
#define XPAR=5FOPB=5FINTC=5F0=5FSYSTEM=5FFPGA=5F0=5FPCI32=5FBRIDGE=5FPCI=5FINTC=5FINTR 4
#define XPAR=5FSYSTEM=5FFPGA=5F0=5FPCI32=5FBRIDGE=5FPCI=5FINTB=5FMASK 0X000020
#define XPAR=5FOPB=5FINTC=5F0=5FSYSTEM=5FFPGA=5F0=5FPCI32=5FBRIDGE=5FPCI=5FINTB=5FINTR 5
#define XPAR=5FSYSTEM=5FFPGA=5F0=5FPCI32=5FBRIDGE=5FPCI=5FINTA=5FMASK 0X000040
#define XPAR=5FOPB=5FINTC=5F0=5FSYSTEM=5FFPGA=5F0=5FPCI32=5FBRIDGE=5FPCI=5FINTA=5FINTR 6
#define XPAR=5FSYSACE=5FCOMPACTFLASH=5FSYSACE=5FIRQ=5FMASK 0X000080
#define XPAR=5FOPB=5FINTC=5F0=5FSYSACE=5FCOMPACTFLASH=5FSYSACE=5FIRQ=5FINTR 7
#define XPAR=5FPCI32=5FBRIDGE=5FIP2INTC=5FIRPT=5FMASK 0X000100
#define XPAR=5FOPB=5FINTC=5F0=5FPCI32=5FBRIDGE=5FIP2INTC=5FIRPT=5FINTR 8
#define XPAR=5FSPI=5FEEPROM=5FIP2INTC=5FIRPT=5FMASK 0X000200
#define XPAR=5FOPB=5FINTC=5F0=5FSPI=5FEEPROM=5FIP2INTC=5FIRPT=5FINTR 9
#define XPAR=5FDDR=5FSDRAM=5F32MX64=5FIP2INTC=5FIRPT=5FMASK 0X000400
#define XPAR=5FOPB=5FINTC=5F0=5FDDR=5FSDRAM=5F32MX64=5FIP2INTC=5FIRPT=5FINTR 10
#define XPAR=5FRS232=5FUART=5FINTERRUPT=5FMASK 0X000800
#define XPAR=5FOPB=5FINTC=5F0=5FRS232=5FUART=5FINTERRUPT=5FINTR 11

/******************************************************************/

/* Definitions for driver DDR */
#define XPAR=5FXDDR=5FNUM=5FINSTANCES 1

/* Definitions for peripheral DDR=5FSDRAM=5F32MX64 */
#define XPAR=5FDDR=5FSDRAM=5F32MX64=5FECC=5FBASEADDR 0xFFFFFFFF
#define XPAR=5FDDR=5FSDRAM=5F32MX64=5FECC=5FHIGHADDR 0x00000000
#define XPAR=5FDDR=5FSDRAM=5F32MX64=5FDEVICE=5FID 0
#define XPAR=5FDDR=5FSDRAM=5F32MX64=5FINCLUDE=5FECC=5FINTR 0


/******************************************************************/

/* Definitions for peripheral DDR=5FSDRAM=5F32MX64 */
#define XPAR=5FDDR=5FSDRAM=5F32MX64=5FMEM0=5FBASEADDR 0x00000000
#define XPAR=5FDDR=5FSDRAM=5F32MX64=5FMEM0=5FHIGHADDR 0x0FFFFFFF

/******************************************************************/


/* Definitions for peripheral PLB=5FBRAM=5FIF=5FCNTLR=5F1 */
#define XPAR=5FPLB=5FBRAM=5FIF=5FCNTLR=5F1=5FBASEADDR 0xfffe0000
#define XPAR=5FPLB=5FBRAM=5FIF=5FCNTLR=5F1=5FHIGHADDR 0xffffffff


/******************************************************************/

#define XPAR=5FCPU=5FPPC405=5FCORE=5FCLOCK=5FFREQ=5FHZ 100000000

/******************************************************************/

#define XPAR=5FCPU=5FID 0
#define XPAR=5FPPC405=5FID 0
#define XPAR=5FPPC405=5FCORE=5FCLOCK=5FFREQ=5FHZ 100000000
#define XPAR=5FPPC405=5FISOCM=5FDCR=5FBASEADDR 0x00000010
#define XPAR=5FPPC405=5FISOCM=5FDCR=5FHIGHADDR 0x00000013
#define XPAR=5FPPC405=5FDSOCM=5FDCR=5FBASEADDR 0x00000020
#define XPAR=5FPPC405=5FDSOCM=5FDCR=5FHIGHADDR 0x00000023
#define XPAR=5FPPC405=5FDISABLE=5FOPERAND=5FFORWARDING 1
#define XPAR=5FPPC405=5FDETERMINISTIC=5FMULT 0
#define XPAR=5FPPC405=5FMMU=5FENABLE 1
#define XPAR=5FPPC405=5FDCR=5FRESYNC 0
#define XPAR=5FPPC405=5FHW=5FVER "2.00.c"

/******************************************************************/


/******************************************************************/

/* Cannonical Constant Names */

/******************************************************************/

#define XPAR=5FUARTLITE=5F0=5FBASEADDR XPAR=5FRS232=5FUART=5FBASEADDR
#define XPAR=5FUARTLITE=5F0=5FHIGHADDR XPAR=5FRS232=5FUART=5FHIGHADDR
#define XPAR=5FUARTLITE=5F0=5FDEVICE=5FID XPAR=5FRS232=5FUART=5FDEVICE=5FID

/******************************************************************/

#define XPAR=5FSPI=5F0=5FBASEADDR XPAR=5FSPI=5FEEPROM=5FBASEADDR
#define XPAR=5FSPI=5F0=5FHIGHADDR XPAR=5FSPI=5FEEPROM=5FHIGHADDR
#define XPAR=5FSPI=5F0=5FFIFO=5FEXIST XPAR=5FSPI=5FEEPROM=5FFIFO=5FEXIST
#define XPAR=5FSPI=5F0=5FSPI=5FSLAVE=5FONLY XPAR=5FSPI=5FEEPROM=5FSPI=5FSLAVE=5FONLY
#define XPAR=5FSPI=5F0=5FNUM=5FSS=5FBITS XPAR=5FSPI=5FEEPROM=5FNUM=5FSS=5FBITS
#define XPAR=5FSPI=5F0=5FDEVICE=5FID XPAR=5FSPI=5FEEPROM=5FDEVICE=5FID

/******************************************************************/

#define XPAR=5FSYSACE=5F0=5FBASEADDR XPAR=5FSYSACE=5FCOMPACTFLASH=5FBASEADDR
#define XPAR=5FSYSACE=5F0=5FHIGHADDR XPAR=5FSYSACE=5FCOMPACTFLASH=5FHIGHADDR
#define XPAR=5FSYSACE=5F0=5FDEVICE=5FID XPAR=5FSYSACE=5FCOMPACTFLASH=5FDEVICE=5FID

/******************************************************************/

#define XPAR=5FINTC=5F0=5FBASEADDR XPAR=5FOPB=5FINTC=5F0=5FBASEADDR
#define XPAR=5FINTC=5F0=5FHIGHADDR XPAR=5FOPB=5FINTC=5F0=5FHIGHADDR
#define XPAR=5FINTC=5F0=5FKIND=5FOF=5FINTR XPAR=5FOPB=5FINTC=5F0=5FKIND=5FOF=5FINTR
#define XPAR=5FINTC=5F0=5FDEVICE=5FID XPAR=5FOPB=5FINTC=5F0=5FDEVICE=5FID

/******************************************************************/

#define XPAR=5FINTC=5F0=5FSYSACE=5F0=5FVEC=5FID XPAR=5FOPB=5FINTC=5F0=5FSYSACE=5FCOMPACTFLASH=5FSY=
SACE=5FIRQ=5FINTR
#define XPAR=5FINTC=5F0=5FPCI=5F0=5FVEC=5FID=5FA XPAR=5FOPB=5FINTC=5F0=5FPCI32=5FBRIDGE=5FIP2INTC=5FIR=
PT=5FINTR
#define XPAR=5FINTC=5F0=5FPCI=5F0=5FVEC=5FID=5FB XPAR=5FOPB=5FINTC=5F0=5FPCI32=5FBRIDGE=5FIP2INTC=5FIR=
PT=5FINTR
#define XPAR=5FINTC=5F0=5FPCI=5F0=5FVEC=5FID=5FC XPAR=5FOPB=5FINTC=5F0=5FPCI32=5FBRIDGE=5FIP2INTC=5FIR=
PT=5FINTR
#define XPAR=5FINTC=5F0=5FPCI=5F0=5FVEC=5FID=5FD XPAR=5FOPB=5FINTC=5F0=5FPCI32=5FBRIDGE=5FIP2INTC=5FIR=
PT=5FINTR
#define XPAR=5FINTC=5F0=5FSPI=5F0=5FVEC=5FID XPAR=5FOPB=5FINTC=5F0=5FSPI=5FEEPROM=5FIP2INTC=5FIRPT=5FI=
NTR
#define XPAR=5FINTC=5F0=5FDDR=5F0=5FVEC=5FID XPAR=5FOPB=5FINTC=5F0=5FDDR=5FSDRAM=5F32MX64=5FIP2INTC=5F=
IRPT=5FINTR
#define XPAR=5FINTC=5F0=5FUARTLITE=5F0=5FVEC=5FID XPAR=5FOPB=5FINTC=5F0=5FRS232=5FUART=5FINTERRUPT=
=5FINTR

/******************************************************************/

#define XPAR=5FPLB=5FCLOCK=5FFREQ=5FHZ 100000000
#define XPAR=5FCORE=5FCLOCK=5FFREQ=5FHZ XPAR=5FCPU=5FPPC405=5FCORE=5FCLOCK=5FFREQ=5FHZ
#define XPAR=5FDDR=5F0=5FSIZE 0x10000000

/******************************************************************/

#define XPAR=5FPCI=5F0=5FCLOCK=5FFREQ=5FHZ    0

/******************************************************************/

=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F=5F
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Re: Linux for ml310

[Grant Likely]

On 1/10/08, Joachim Meyer <Jogi95@web.de> wrote:
> Hi again
>
> I tried my compiled kernel this morning.
> I loaded my Bitstream onto the FPGA, then the zImage.elf via xmd: dow zIm=
age.elf.
> After I typed "run" I got foolowing message on an Terminal:
> ------------------------------------------------------------------------
> loaded at:     00400000 004F219C
> board data at: 004F0120 004F019C
> relocated to:  00404048 004040C4
> zimage at:     00404E39 004EF931
> avail ram:     004F3000 10000000
>
> Linux/PPC load: console=3DttyS0,9600
                          ^^^^^^^^^^
should be 'console=3DttyUL0'

> Uncompressing Linux...done.
> Now booting the kernel
>
> ------------------------------------------------------------------------
> Doesn't look that bad I think. ;)
> The Question I have is of course why he stops there.
> Is it why He can't find a rootfs?
> Or would he say this in that case.
> I found someone with an similar Problem:
> http://lists.ppckernel.org/pipermail/ppckernel/2006-May/000026.html
> but I already use the xparameters_ml310 from my BSP.
> Where must I look for the error?
> There where some warnings when I compiled the kernel. Is this ok?
>
> Greets & THX
> Joachim
>
> PS: My xparameters_ml310.h
> -------------------------------------------------------------------------=
-----------------------------------------------
> /*******************************************************************
> *
> * CAUTION: This file is automatically generated by libgen.
> * Version: Xilinx EDK 9.1.02 EDK_J_SP2.4
> * DO NOT EDIT.
> *
> * Copyright (c) 2005 Xilinx, Inc.  All rights reserved.
> *
> * Description: Driver parameters
> *
> *******************************************************************/
>
> /* Definitions for driver UARTLITE */
> #define XPAR_XUARTLITE_NUM_INSTANCES 1
>
> /* Definitions for peripheral RS232_UART */
> #define XPAR_RS232_UART_BASEADDR 0x40600000
> #define XPAR_RS232_UART_HIGHADDR 0x4060FFFF
> #define XPAR_RS232_UART_DEVICE_ID 0
> #define XPAR_RS232_UART_BAUDRATE 9600
> #define XPAR_RS232_UART_USE_PARITY 0
> #define XPAR_RS232_UART_ODD_PARITY 0
> #define XPAR_RS232_UART_DATA_BITS 8
>
>
> /******************************************************************/
>
> /* Definitions for driver SPI */
> #define XPAR_XSPI_NUM_INSTANCES 1
>
> /* Definitions for peripheral SPI_EEPROM */
> #define XPAR_SPI_EEPROM_BASEADDR 0x4B308000
> #define XPAR_SPI_EEPROM_HIGHADDR 0x4B30807F
> #define XPAR_SPI_EEPROM_DEVICE_ID 0
> #define XPAR_SPI_EEPROM_FIFO_EXIST 1
> #define XPAR_SPI_EEPROM_SPI_SLAVE_ONLY 0
> #define XPAR_SPI_EEPROM_NUM_SS_BITS 1
>
>
> /******************************************************************/
>
> /* Definitions for driver PCI */
> #define XPAR_XPCI_NUM_INSTANCES 1
>
> /* Definitions for peripheral PCI32_BRIDGE */
> #define XPAR_PCI32_BRIDGE_DEVICE_ID 0
> #define XPAR_PCI32_BRIDGE_BASEADDR 0x42600000
> #define XPAR_PCI32_BRIDGE_HIGHADDR 0x4260FFFF
> #define XPAR_PCI32_BRIDGE_PCIBAR_0 0x00000000
> #define XPAR_PCI32_BRIDGE_PCIBAR_LEN_0 7
> #define XPAR_PCI32_BRIDGE_PCIBAR2IPIF_0 0
> #define XPAR_PCI32_BRIDGE_PCIBAR_ENDIAN_TRANSLATE_EN_0 0
> #define XPAR_PCI32_BRIDGE_PCI_PREFETCH_0 1
> #define XPAR_PCI32_BRIDGE_PCI_SPACETYPE_0 1
> #define XPAR_PCI32_BRIDGE_PCIBAR_1 0xffffffff
> #define XPAR_PCI32_BRIDGE_PCIBAR_LEN_1 20
> #define XPAR_PCI32_BRIDGE_PCIBAR2IPIF_1 0
> #define XPAR_PCI32_BRIDGE_PCIBAR_ENDIAN_TRANSLATE_EN_1 0
> #define XPAR_PCI32_BRIDGE_PCI_PREFETCH_1 1
> #define XPAR_PCI32_BRIDGE_PCI_SPACETYPE_1 1
> #define XPAR_PCI32_BRIDGE_PCIBAR_2 0xffffffff
> #define XPAR_PCI32_BRIDGE_PCIBAR_LEN_2 20
> #define XPAR_PCI32_BRIDGE_PCIBAR2IPIF_2 0
> #define XPAR_PCI32_BRIDGE_PCIBAR_ENDIAN_TRANSLATE_EN_2 0
> #define XPAR_PCI32_BRIDGE_PCI_PREFETCH_2 1
> #define XPAR_PCI32_BRIDGE_PCI_SPACETYPE_2 1
> #define XPAR_PCI32_BRIDGE_IPIFBAR_0 0x60000000
> #define XPAR_PCI32_BRIDGE_IPIF_HIGHADDR_0 0x7fffffff
> #define XPAR_PCI32_BRIDGE_IPIFBAR2PCI_0 0
> #define XPAR_PCI32_BRIDGE_IPIFBAR_ENDIAN_TRANSLATE_EN_0 0
> #define XPAR_PCI32_BRIDGE_IPIF_PREFETCH_0 1
> #define XPAR_PCI32_BRIDGE_IPIF_SPACETYPE_0 1
> #define XPAR_PCI32_BRIDGE_IPIFBAR_1 0x54000000
> #define XPAR_PCI32_BRIDGE_IPIF_HIGHADDR_1 0x57ffffff
> #define XPAR_PCI32_BRIDGE_IPIFBAR2PCI_1 0
> #define XPAR_PCI32_BRIDGE_IPIFBAR_ENDIAN_TRANSLATE_EN_1 0
> #define XPAR_PCI32_BRIDGE_IPIF_PREFETCH_1 1
> #define XPAR_PCI32_BRIDGE_IPIF_SPACETYPE_1 0
> #define XPAR_PCI32_BRIDGE_IPIFBAR_2 0xffffffff
> #define XPAR_PCI32_BRIDGE_IPIF_HIGHADDR_2 0x00000000
> #define XPAR_PCI32_BRIDGE_IPIFBAR2PCI_2 0
> #define XPAR_PCI32_BRIDGE_IPIFBAR_ENDIAN_TRANSLATE_EN_2 0
> #define XPAR_PCI32_BRIDGE_IPIF_PREFETCH_2 1
> #define XPAR_PCI32_BRIDGE_IPIF_SPACETYPE_2 1
> #define XPAR_PCI32_BRIDGE_IPIFBAR_3 0xffffffff
> #define XPAR_PCI32_BRIDGE_IPIF_HIGHADDR_3 0x00000000
> #define XPAR_PCI32_BRIDGE_IPIFBAR2PCI_3 0
> #define XPAR_PCI32_BRIDGE_IPIFBAR_ENDIAN_TRANSLATE_EN_3 0
> #define XPAR_PCI32_BRIDGE_IPIF_PREFETCH_3 1
> #define XPAR_PCI32_BRIDGE_IPIF_SPACETYPE_3 1
> #define XPAR_PCI32_BRIDGE_IPIFBAR_4 0xffffffff
> #define XPAR_PCI32_BRIDGE_IPIF_HIGHADDR_4 0x00000000
> #define XPAR_PCI32_BRIDGE_IPIFBAR2PCI_4 0
> #define XPAR_PCI32_BRIDGE_IPIFBAR_ENDIAN_TRANSLATE_EN_4 0
> #define XPAR_PCI32_BRIDGE_IPIF_PREFETCH_4 1
> #define XPAR_PCI32_BRIDGE_IPIF_SPACETYPE_4 1
> #define XPAR_PCI32_BRIDGE_IPIFBAR_5 0xffffffff
> #define XPAR_PCI32_BRIDGE_IPIF_HIGHADDR_5 0x00000000
> #define XPAR_PCI32_BRIDGE_IPIFBAR2PCI_5 0
> #define XPAR_PCI32_BRIDGE_IPIFBAR_ENDIAN_TRANSLATE_EN_5 0
> #define XPAR_PCI32_BRIDGE_IPIF_PREFETCH_5 1
> #define XPAR_PCI32_BRIDGE_IPIF_SPACETYPE_5 1
> #define XPAR_PCI32_BRIDGE_DMA_BASEADDR 0xFFFFFFFF
> #define XPAR_PCI32_BRIDGE_DMA_HIGHADDR 0x00000000
> #define XPAR_PCI32_BRIDGE_DMA_CHAN_TYPE 9
> #define XPAR_PCI32_BRIDGE_DMA_LENGTH_WIDTH 13
> #define XPAR_PCI32_BRIDGE_BRIDGE_IDSEL_ADDR_BIT 16
>
>
> /******************************************************************/
>
> #define XPAR_XSYSACE_MEM_WIDTH 8
> /* Definitions for driver SYSACE */
> #define XPAR_XSYSACE_NUM_INSTANCES 1
>
> /* Definitions for peripheral SYSACE_COMPACTFLASH */
> #define XPAR_SYSACE_COMPACTFLASH_BASEADDR 0x41800000
> #define XPAR_SYSACE_COMPACTFLASH_HIGHADDR 0x4180FFFF
> #define XPAR_SYSACE_COMPACTFLASH_DEVICE_ID 0
> #define XPAR_SYSACE_COMPACTFLASH_MEM_WIDTH 8
>
>
> /******************************************************************/
>
> #define XPAR_INTC_MAX_NUM_INTR_INPUTS 12
> #define XPAR_XINTC_HAS_IPR 1
> #define XPAR_XINTC_USE_DCR 0
> /* Definitions for driver INTC */
> #define XPAR_XINTC_NUM_INSTANCES 1
>
> /* Definitions for peripheral OPB_INTC_0 */
> #define XPAR_OPB_INTC_0_BASEADDR 0x41200000
> #define XPAR_OPB_INTC_0_HIGHADDR 0x4120FFFF
> #define XPAR_OPB_INTC_0_DEVICE_ID 0
> #define XPAR_OPB_INTC_0_KIND_OF_INTR 0x00000C00
>
>
> /******************************************************************/
>
> #define XPAR_INTC_SINGLE_BASEADDR 0x41200000
> #define XPAR_INTC_SINGLE_HIGHADDR 0x4120FFFF
> #define XPAR_INTC_SINGLE_DEVICE_ID XPAR_OPB_INTC_0_DEVICE_ID
> #define XPAR_SYSTEM_FPGA_0_PCI32_BRIDGE_PCI_SBR_INT_MASK 0X000001
> #define XPAR_OPB_INTC_0_SYSTEM_FPGA_0_PCI32_BRIDGE_PCI_SBR_INT_INTR 0
> #define XPAR_SYSTEM_FPGA_0_PCI32_BRIDGE_PCI_INTF_MASK 0X000002
> #define XPAR_OPB_INTC_0_SYSTEM_FPGA_0_PCI32_BRIDGE_PCI_INTF_INTR 1
> #define XPAR_SYSTEM_FPGA_0_PCI32_BRIDGE_PCI_INTE_MASK 0X000004
> #define XPAR_OPB_INTC_0_SYSTEM_FPGA_0_PCI32_BRIDGE_PCI_INTE_INTR 2
> #define XPAR_SYSTEM_FPGA_0_PCI32_BRIDGE_PCI_INTD_MASK 0X000008
> #define XPAR_OPB_INTC_0_SYSTEM_FPGA_0_PCI32_BRIDGE_PCI_INTD_INTR 3
> #define XPAR_SYSTEM_FPGA_0_PCI32_BRIDGE_PCI_INTC_MASK 0X000010
> #define XPAR_OPB_INTC_0_SYSTEM_FPGA_0_PCI32_BRIDGE_PCI_INTC_INTR 4
> #define XPAR_SYSTEM_FPGA_0_PCI32_BRIDGE_PCI_INTB_MASK 0X000020
> #define XPAR_OPB_INTC_0_SYSTEM_FPGA_0_PCI32_BRIDGE_PCI_INTB_INTR 5
> #define XPAR_SYSTEM_FPGA_0_PCI32_BRIDGE_PCI_INTA_MASK 0X000040
> #define XPAR_OPB_INTC_0_SYSTEM_FPGA_0_PCI32_BRIDGE_PCI_INTA_INTR 6
> #define XPAR_SYSACE_COMPACTFLASH_SYSACE_IRQ_MASK 0X000080
> #define XPAR_OPB_INTC_0_SYSACE_COMPACTFLASH_SYSACE_IRQ_INTR 7
> #define XPAR_PCI32_BRIDGE_IP2INTC_IRPT_MASK 0X000100
> #define XPAR_OPB_INTC_0_PCI32_BRIDGE_IP2INTC_IRPT_INTR 8
> #define XPAR_SPI_EEPROM_IP2INTC_IRPT_MASK 0X000200
> #define XPAR_OPB_INTC_0_SPI_EEPROM_IP2INTC_IRPT_INTR 9
> #define XPAR_DDR_SDRAM_32MX64_IP2INTC_IRPT_MASK 0X000400
> #define XPAR_OPB_INTC_0_DDR_SDRAM_32MX64_IP2INTC_IRPT_INTR 10
> #define XPAR_RS232_UART_INTERRUPT_MASK 0X000800
> #define XPAR_OPB_INTC_0_RS232_UART_INTERRUPT_INTR 11
>
> /******************************************************************/
>
> /* Definitions for driver DDR */
> #define XPAR_XDDR_NUM_INSTANCES 1
>
> /* Definitions for peripheral DDR_SDRAM_32MX64 */
> #define XPAR_DDR_SDRAM_32MX64_ECC_BASEADDR 0xFFFFFFFF
> #define XPAR_DDR_SDRAM_32MX64_ECC_HIGHADDR 0x00000000
> #define XPAR_DDR_SDRAM_32MX64_DEVICE_ID 0
> #define XPAR_DDR_SDRAM_32MX64_INCLUDE_ECC_INTR 0
>
>
> /******************************************************************/
>
> /* Definitions for peripheral DDR_SDRAM_32MX64 */
> #define XPAR_DDR_SDRAM_32MX64_MEM0_BASEADDR 0x00000000
> #define XPAR_DDR_SDRAM_32MX64_MEM0_HIGHADDR 0x0FFFFFFF
>
> /******************************************************************/
>
>
> /* Definitions for peripheral PLB_BRAM_IF_CNTLR_1 */
> #define XPAR_PLB_BRAM_IF_CNTLR_1_BASEADDR 0xfffe0000
> #define XPAR_PLB_BRAM_IF_CNTLR_1_HIGHADDR 0xffffffff
>
>
> /******************************************************************/
>
> #define XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ 100000000
>
> /******************************************************************/
>
> #define XPAR_CPU_ID 0
> #define XPAR_PPC405_ID 0
> #define XPAR_PPC405_CORE_CLOCK_FREQ_HZ 100000000
> #define XPAR_PPC405_ISOCM_DCR_BASEADDR 0x00000010
> #define XPAR_PPC405_ISOCM_DCR_HIGHADDR 0x00000013
> #define XPAR_PPC405_DSOCM_DCR_BASEADDR 0x00000020
> #define XPAR_PPC405_DSOCM_DCR_HIGHADDR 0x00000023
> #define XPAR_PPC405_DISABLE_OPERAND_FORWARDING 1
> #define XPAR_PPC405_DETERMINISTIC_MULT 0
> #define XPAR_PPC405_MMU_ENABLE 1
> #define XPAR_PPC405_DCR_RESYNC 0
> #define XPAR_PPC405_HW_VER "2.00.c"
>
> /******************************************************************/
>
>
> /******************************************************************/
>
> /* Cannonical Constant Names */
>
> /******************************************************************/
>
> #define XPAR_UARTLITE_0_BASEADDR XPAR_RS232_UART_BASEADDR
> #define XPAR_UARTLITE_0_HIGHADDR XPAR_RS232_UART_HIGHADDR
> #define XPAR_UARTLITE_0_DEVICE_ID XPAR_RS232_UART_DEVICE_ID
>
> /******************************************************************/
>
> #define XPAR_SPI_0_BASEADDR XPAR_SPI_EEPROM_BASEADDR
> #define XPAR_SPI_0_HIGHADDR XPAR_SPI_EEPROM_HIGHADDR
> #define XPAR_SPI_0_FIFO_EXIST XPAR_SPI_EEPROM_FIFO_EXIST
> #define XPAR_SPI_0_SPI_SLAVE_ONLY XPAR_SPI_EEPROM_SPI_SLAVE_ONLY
> #define XPAR_SPI_0_NUM_SS_BITS XPAR_SPI_EEPROM_NUM_SS_BITS
> #define XPAR_SPI_0_DEVICE_ID XPAR_SPI_EEPROM_DEVICE_ID
>
> /******************************************************************/
>
> #define XPAR_SYSACE_0_BASEADDR XPAR_SYSACE_COMPACTFLASH_BASEADDR
> #define XPAR_SYSACE_0_HIGHADDR XPAR_SYSACE_COMPACTFLASH_HIGHADDR
> #define XPAR_SYSACE_0_DEVICE_ID XPAR_SYSACE_COMPACTFLASH_DEVICE_ID
>
> /******************************************************************/
>
> #define XPAR_INTC_0_BASEADDR XPAR_OPB_INTC_0_BASEADDR
> #define XPAR_INTC_0_HIGHADDR XPAR_OPB_INTC_0_HIGHADDR
> #define XPAR_INTC_0_KIND_OF_INTR XPAR_OPB_INTC_0_KIND_OF_INTR
> #define XPAR_INTC_0_DEVICE_ID XPAR_OPB_INTC_0_DEVICE_ID
>
> /******************************************************************/
>
> #define XPAR_INTC_0_SYSACE_0_VEC_ID XPAR_OPB_INTC_0_SYSACE_COMPACTFLASH_S=
YSACE_IRQ_INTR
> #define XPAR_INTC_0_PCI_0_VEC_ID_A XPAR_OPB_INTC_0_PCI32_BRIDGE_IP2INTC_I=
RPT_INTR
> #define XPAR_INTC_0_PCI_0_VEC_ID_B XPAR_OPB_INTC_0_PCI32_BRIDGE_IP2INTC_I=
RPT_INTR
> #define XPAR_INTC_0_PCI_0_VEC_ID_C XPAR_OPB_INTC_0_PCI32_BRIDGE_IP2INTC_I=
RPT_INTR
> #define XPAR_INTC_0_PCI_0_VEC_ID_D XPAR_OPB_INTC_0_PCI32_BRIDGE_IP2INTC_I=
RPT_INTR
> #define XPAR_INTC_0_SPI_0_VEC_ID XPAR_OPB_INTC_0_SPI_EEPROM_IP2INTC_IRPT_=
INTR
> #define XPAR_INTC_0_DDR_0_VEC_ID XPAR_OPB_INTC_0_DDR_SDRAM_32MX64_IP2INTC=
_IRPT_INTR
> #define XPAR_INTC_0_UARTLITE_0_VEC_ID XPAR_OPB_INTC_0_RS232_UART_INTERRUP=
T_INTR
>
> /******************************************************************/
>
> #define XPAR_PLB_CLOCK_FREQ_HZ 100000000
> #define XPAR_CORE_CLOCK_FREQ_HZ XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ
> #define XPAR_DDR_0_SIZE 0x10000000
>
> /******************************************************************/
>
> #define XPAR_PCI_0_CLOCK_FREQ_HZ    0
>
> /******************************************************************/
>
> _______________________________________________________________________
> Jetzt neu! Sch=FCtzen Sie Ihren PC mit McAfee und WEB.DE. 30 Tage
> kostenlos testen. http://www.pc-sicherheit.web.de/startseite/?mc=3D022220
>
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
>


--=20
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

Re: Linux for ml310

[Joachim Meyer]

Big thx...it works
Greez
Joachim
_____________________________________________________________________
Der WEB.DE SmartSurfer hilft bis zu 70% Ihrer Onlinekosten zu sparen!
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Re: Linux for ml310

[Grant Likely]

On 1/10/08, Joachim Meyer <Jogi95@web.de> wrote:
> Big thx...it works

Congratulations!  Have fun.

g.

-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

Re: Linux for ml310

[Enno Lübbers]

Hi Joachim,

I haven't tried the XUP or the ML310 yet, but I just managed to get  
Linux 2.4.26 from Bitkeeper running on a ML403 board (a Virtex-4FX12).  
However, I'm seriously considering moving to the 2.6 kernel, for  
various reasons.

Your problems seem to be related to the BSP configuration. Have you  
set the corerct options in the Software Platform Settings of the EDK?  
In particular, you need to set the clock frequency and the attached  
peripherals in the "OS and Libraries" section.

Regards
- Enno

-- 
Dipl.-Ing. Enno Luebbers
Computer Science Department
University of Paderborn	

Warburger Str. 100		
33098 Paderborn			

http://wwwcs.upb.de/cs/ag-platzner
phone:  05251 / 60-5397
fax:    05251 / 60-5377

Re: Linux for ml310

[greenlean]

Hi, I was reading this post and a question came to my mind.

When I try to compile, did I have to copy the EDK driver folder to my Xilinx
2.6 kernel tree and run the cow.tcl script generated by EDK?? Or this is
unnecesay??




Grant Likely-2 wrote:
> 
> On 1/9/08, Joachim Meyer <Jogi95@web.de> wrote:
>> Hi
>>
>> I switched "Xilinx uartlite serieal port support" and "Support for
>> console on Xilinxuartlite serialport" on and "8250/16550 and compatible
>> serial support" off, in the kernel config.
>> Then I removed the things I added in the xparameters.h and compiled
>> successfully.
>> But I have yet a few Questions:
>>
>> - What would you recommend to use? UART-Lite or a 16550 serial port. Can
>> I get a console running on the RS232 Port of the Board with both
>> possibilities?
> 
> if you don't need to change the baud rate at runtime then use the
> uartlite.
> 
> Console works on both.
> 
>>
>> - Can you recommend anything for my next steps to get an running linux
>> (rootfs usw.)? So far I oriented myself on the Klingauf page, but I think
>> it is perhaps not the best one because its too old and some things will
>> probably not work the way he did it anymore.
> 
> Use either ELDK or buildroot.  Personally, I'd like to be using
> OpenEmbedded, but I haven't been successful with that yet.
> 
> Cheers,
> g.
> 
> -- 
> Grant Likely, B.Sc., P.Eng.
> Secret Lab Technologies Ltd.
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
> 
> 

-- 
View this message in context: http://www.nabble.com/Linux-for-ml310-tp14675554p14808605.html
Sent from the linuxppc-embedded mailing list archive at Nabble.com.

RE: Linux for ml310

[Stephen Neuendorffer]

If you are using the secretlab.ca or git.xilinx.com trees, then you
should *not* follow the normal BSP generation process.  You need to
generate the BSP in a dummy location and then copy only the
xparameters_*.h file over the appropriate one in
arch/ppc/platforms/4xx/xparameters and make menuconfig.

Steve

> -----Original Message-----
> From: linuxppc-embedded-bounces+stephen=3Dneuendorffer.name@ozlabs.org
[mailto:linuxppc-embedded-
> bounces+stephen=3Dneuendorffer.name@ozlabs.org] On Behalf Of greenlean
> Sent: Monday, January 14, 2008 10:42 AM
> To: linuxppc-embedded@ozlabs.org
> Subject: Re: Linux for ml310
>=20
>=20
> Hi, I was reading this post and a question came to my mind.
>=20
> When I try to compile, did I have to copy the EDK driver folder to my
Xilinx
> 2.6 kernel tree and run the cow.tcl script generated by EDK?? Or this
is
> unnecesay??
>=20
>=20
>=20
>=20
> Grant Likely-2 wrote:
> >
> > On 1/9/08, Joachim Meyer <Jogi95@web.de> wrote:
> >> Hi
> >>
> >> I switched "Xilinx uartlite serieal port support" and "Support for
> >> console on Xilinxuartlite serialport" on and "8250/16550 and
compatible
> >> serial support" off, in the kernel config.
> >> Then I removed the things I added in the xparameters.h and compiled
> >> successfully.
> >> But I have yet a few Questions:
> >>
> >> - What would you recommend to use? UART-Lite or a 16550 serial
port. Can
> >> I get a console running on the RS232 Port of the Board with both
> >> possibilities?
> >
> > if you don't need to change the baud rate at runtime then use the
> > uartlite.
> >
> > Console works on both.
> >
> >>
> >> - Can you recommend anything for my next steps to get an running
linux
> >> (rootfs usw.)? So far I oriented myself on the Klingauf page, but I
think
> >> it is perhaps not the best one because its too old and some things
will
> >> probably not work the way he did it anymore.
> >
> > Use either ELDK or buildroot.  Personally, I'd like to be using
> > OpenEmbedded, but I haven't been successful with that yet.
> >
> > Cheers,
> > g.
> >
> > --
> > Grant Likely, B.Sc., P.Eng.
> > Secret Lab Technologies Ltd.
> > _______________________________________________
> > Linuxppc-embedded mailing list
> > Linuxppc-embedded@ozlabs.org
> > https://ozlabs.org/mailman/listinfo/linuxppc-embedded
> >
> >
>=20
> --
> View this message in context:
http://www.nabble.com/Linux-for-ml310-tp14675554p14808605.html
> Sent from the linuxppc-embedded mailing list archive at Nabble.com.
>=20
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded