* [PATCH 0/2] RFC: Port Virtex-II Pro code to use the platform bus
@ 2005-09-10 7:33 Grant Likely
2005-09-11 6:57 ` Grant Likely
0 siblings, 1 reply; 2+ messages in thread
From: Grant Likely @ 2005-09-10 7:33 UTC (permalink / raw)
To: linuxppc-embedded
Here is my work to date to bring the V2Pro port over to the platform
bus. I don't expect these to be accepted as-is, but I'm looking for
comments before I get it polished.
Should apply cleanly against 2.6.13 (but may require the TLB patch first)
http://patchwork.ozlabs.org/linuxppc/patch?id=3D2058
Patch 1: changes from the ML300 perspective. I temporarly don't have
access to an ML300 so this is untested (but it compiles). Could
somebody please test this for me?
Patch 2: example patch for another V2PRO based board. This isn't
really acceptable for mainline because it's not based on a reference
or published FPGA design, but it shows the work required to bring up
another board. It also shines some light on what code should be
common between all V2Pro ports (which I'm working on). This one runs
on a 2VP4-FG456 eval board (pls ignore all the references to 2VP30).
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH 0/2] RFC: Port Virtex-II Pro code to use the platform bus
2005-09-10 7:33 [PATCH 0/2] RFC: Port Virtex-II Pro code to use the platform bus Grant Likely
@ 2005-09-11 6:57 ` Grant Likely
0 siblings, 0 replies; 2+ messages in thread
From: Grant Likely @ 2005-09-11 6:57 UTC (permalink / raw)
To: linuxppc-embedded
BTW, I'll be out of town and computer-free until Sept. 19, so I won't
answer any comments until then.
Cheers,
g.
On 9/10/05, Grant Likely <glikely@gmail.com> wrote:
> Here is my work to date to bring the V2Pro port over to the platform
> bus. I don't expect these to be accepted as-is, but I'm looking for
> comments before I get it polished.
>=20
> Should apply cleanly against 2.6.13 (but may require the TLB patch first)
> http://patchwork.ozlabs.org/linuxppc/patch?id=3D2058
>=20
> Patch 1: changes from the ML300 perspective. I temporarly don't have
> access to an ML300 so this is untested (but it compiles). Could
> somebody please test this for me?
>=20
> Patch 2: example patch for another V2PRO based board. This isn't
> really acceptable for mainline because it's not based on a reference
> or published FPGA design, but it shows the work required to bring up
> another board. It also shines some light on what code should be
> common between all V2Pro ports (which I'm working on). This one runs
> on a 2VP4-FG456 eval board (pls ignore all the references to 2VP30).
>
^ permalink raw reply [flat|nested] 2+ messages in thread
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