Re: status of mpc52xx with arch=powerpc?

["Grant Likely" <grant.likely@secretlab.ca>]

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On 10/24/06, Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
> Can you send me your .dts ?

Here you go; for discussion purposes only!  :)

This is pretty rough stuff, and it haven't even got to the point of
using it to boot a kernel.  But if it's a starting point to figure out
what the 52xx device tree should look like then go to it!

g.


-- 
Grant Likely, B.Sc. P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195

[-- Attachment #2: lite5200b.dts --]
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/*
 * Lite5200b board Device Tree Source
 *
 * Copyright 2006 Secret Lab Technologies Ltd.
 * Grant Likely <grant.likely@secretlab.ca>
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

/ {
	model = "Lite5200b";
	compatible = "mpc52xx";
	#address-cells = <1>;
	#size-cells = <1>;

	cpus {
		#cpus = <1>;
		#address-cells = <1>;
		#size-cells = <0>;

		PowerPC,5200@0 {
			device_type = "cpu";
			reg = <0>;
			d-cache-line-size = <20>;
			i-cache-line-size = <20>;
			d-cache-size = <4000>;		// L1, 16K
			i-cache-size = <4000>;		// L1, 16K
			timebase-frequency = <0>;	// from bootloader
			bus-frequency = <0>;		// from bootloader
			clock-frequency = <0>;		// from bootloader
			32-bit;
		};
	};

	memory {
		device_type = "memory";
		reg = <00000000 10000000>;	// 256MB
	};

	soc5200@f0000000 {
		#address-cells = <1>;
		#size-cells = <1>;
		#interrupt-cells = <2>;
		device_type = "soc";
		ranges = <0 f0000000 f0010000>;
		reg = <f0000000 00010000>;
		bus-frequency = <0>;

		pic@500 {
			linux,phandle = <500>;
			interrupt-controller;
			#address-cells = <0>;
			#interrupt-cells = <2>;
			reg = <500 80>;
			built-in;
			device_type = "52xx-pic";
		};

		gpt@600 {	// General Purpose Timers
			// Should this be here at all?
			// Or should there be one entry per timer (8 total)?
			compatible = "5200";
			device_type = "gpt";
			reg = <600 100>;
			interrupts = <0e 2 0f 2 10 2 11 2
			              12 2 13 2 14 2 14 2>;
			interrupt-parent = <500>;
		};

		rtc@800 {	// Real time clock
			// Should this be here at all?
			compatible = "5200";
			device_type = "rtc";
			reg = <800 100>;
			interrupts = <0a 2 0b 2>;
			interrupt-parent = <500>;
		};

		mscan@900 {
			compatible = "5200";
			device_type = "mscan";
			interrupts = <37 2>;
			interrupt-parent = <500>;
			reg = <900 80>;
		};

		mscan@980 {
			compatible = "5200";
			device_type = "mscan";
			interrupts = <38 2>;
			interrupt-parent = <500>;
			reg = <980 80>;
		};

		gpio@b00 {
			compatible = "5200";
			device_type = "gpio";
			reg = <b00 100>;
		};

		gpio_wkup@c00 {
			compatible = "5200";
			device_type = "gpio-wkup";
			reg = <c00 100>;
		};

		pci@0d00 {
			#interrupt-cells = <1>;
			#size-cells = <2>;
			#address-cells = <3>;
			compatible = "5200";
			device_type = "pci";
			// I actually know very little about setting up PCI,
			// so anything here would just be pulled out of my
			// butt.  Instead I'll leave these placeholders until
			// I figure out what it should be
			//
			// interrupt-map-mask = <>;
			// interrupt-map = <>;
			// bus-range = <>;
			// ranges = <>;
			//
			clock-frequency = <3f940aa>;
			interrupts = <2f 2 30 2 31 2>;
			interrupt-parent = <500>;
		};

		spi@f00 {
			device_type = "spi";
			compatible = "5200";
			reg = <f00 20>;
			interrupts = <34 2 35 2>;
			interrupt-parent = <500>;
		};

		serial@2000 {		// PSC1
			device_type = "serial";
			compatible = "5200-psc";
			reg = <2000 100>;
			clock-frequency = <0>;
			interrupts = <28 2>;
			interrupt-parent = <500>;
		};

		// PSC2 in spi mode example
		spi@2200 {		// PSC2
			device_type = "spi";
			compatible = "5200-psc";
			reg = <2200 100>;
			clock-frequency = <0>;
			interrupts = <29 2>;
			interrupt-parent = <500>;
		};

		// PSC3 in CODEC mode example
		i2s@2400 {		// PSC3
			device_type = "i2s";
			compatible = "5200-psc";
			reg = <2400 100>;
			clock-frequency = <0>;
			interrupts = <2a 2>;
			interrupt-parent = <500>;
		};

		// PSC4 unconfigured (example of AC97 mode)
		//@2600 {		// PSC4
		//	device_type = "serial";
		//	compatible = "5200-psc";
		//	reg = <2600 100>;
		//	clock-frequency = <0>;
		//	interrupts = <32 2>;
		//	interrupt-parent = <500>;
		//};

		// PSC5 unconfigured
		//serial@2800 {		// PSC5
		//	device_type = "serial";
		//	compatible = "5200-psc";
		//	reg = <2800 100>;
		//	clock-frequency = <0>;
		//	interrupts = <33 2>;
		//	interrupt-parent = <500>;
		//};

		// PSC6 in AC97 mode example
		ac97@2c00 {		// PSC6
			device_type = "ac97";
			compatible = "5200-psc";
			reg = <2c00 100>;
			clock-frequency = <0>;
			interrupts = <2b 2>;
			interrupt-parent = <500>;
		};

		ethernet@3000 {
			#address-cells = <1>;
			#size-cells = <0>;
			device_type = "network";
			model = "FEC";
			compatible = "5200";
			reg = <3000 800>;
			mac-address = [ 02 03 04 05 06 07 ]; // Bad!
			interrupts = <2c 2>;
			interrupt-parent = <500>;
		};

		ata@3a00 {
			device_type = "ata";
			compatible = "5200";
			reg = <3a00 100>;
			interrupts = <2e 2>;
			interrupt-parent = <500>;
		};

		i2c@3d00 {
			device_type = "i2c";
			compatible = "5200";
			reg = <3d00 40>;
			interrupts = <35 2>;
			interrupt-parent = <500>;
		};

		i2c@3d40 {
			device_type = "i2c";
			compatible = "5200";
			reg = <3d40 40>;
			interrupts = <36 2>;
			interrupt-parent = <500>;
		};
	};
};