Mr Grant Likely's New Patches for 2.6 Kernel and Xilinx FPGA ( Virtex-4 & Virtex-2 )

Mr Grant Likely's New Patches for 2.6 Kernel and Xilinx FPGA ( Virtex-4 & Virtex-2 )

[Mohammad Sadegh Sadri]

Hi

I'm seeing mr grant likely releasing new patches to the 2.6 kernel, one of =
them was for system ace and the others ... as a beginner, I do really know =
what are them ...
now some simple questions about these new patches:

- Are these patches going to be part of 2.6.22 kernel? so we should wait a =
little and then using 2.6.22 we will have builtin support for sys ace witho=
ut applying any new patches?
- Do we still new to apply the paulus patch to the main kernel so that we c=
an have hard TEMAC support? Or you have a same program as sys ace for it?=20
- Actually As a beginner I could not understand what are the rest of the pa=
tches released by Grant, I understood that one is for sys ace , but the oth=
ers? Do I really need to apply them to for example , my 2.6.20.4 kernel?=20

Thanks.
_________________________________________________________________
Invite your mail contacts to join your friends list with Windows Live Space=
s. It's easy!
http://spaces.live.com/spacesapi.aspx?wx_action=3Dcreate&wx_url=3D/friends.=
aspx&mkt=3Den-us=

Re: Mr Grant Likely's New Patches for 2.6 Kernel and Xilinx FPGA ( Virtex-4 & Virtex-2

[Grant Likely]

On 4/15/07, Mohammad Sadegh Sadri <mamsadegh@hotmail.com> wrote:
>
> Hi
>
> - Are these patches going to be part of 2.6.22 kernel? so we should wait a little and then using 2.6.22 we will have builtin support for sys ace without applying any new patches?

I would *like* them to become part of 2.6.22, but that really depends
on how well they are received, and if Paull will pick up arch/ppc
patches.

> - Do we still new to apply the paulus patch to the main kernel so that we can have hard TEMAC support? Or you have a same program as sys ace for it?

No, I did not include TEMAC support.  However, I will publish my git
tree tomorrow which will include the TEMAC driver.

> - Actually As a beginner I could not understand what are the rest of the patches
> released by Grant, I understood that one is for sys ace , but the others? Do I
> really need to apply them to for example , my 2.6.20.4 kernel?

You don't need to if you've got a working solution.  But these patches
should make it easier to build a working virtex kernel when using
Linus' tree.

-- 
Grant Likely, B.Sc. P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195

Re: Mr Grant Likely's New Patches for 2.6 Kernel and Xilinx FPGA ( Virtex-4 & Virtex-2

[Andrei Konovalov]

Hi Grant,

Grant Likely wrote:
> On 4/15/07, Mohammad Sadegh Sadri <mamsadegh@hotmail.com> wrote:
>> - Do we still new to apply the paulus patch to the main kernel so that we can have hard TEMAC support? Or you have a same program as sys ace for it?
> 
> No, I did not include TEMAC support.  However, I will publish my git
> tree tomorrow which will include the TEMAC driver.


Seems the TEMAC driver is not on your git server yet. Hence the questions.

What IP versions is your TEMAC driver for?
Guess this is PLB TEMAC version 3.00a as you wrote auto negotiation is supported.

Is your driver based on the one by Xilinx (the one from EDK 8.2.02 and the update posted by Rick Moleres)?
Or is it something written from scratch?
Does it use the "level 1" (OS independent) code from EDK?

Does it support SGDMA, or FIFO mode, or both?
Checksum offloading?


Thanks,
Andrei

Re: Mr Grant Likely's New Patches for 2.6 Kernel and Xilinx FPGA ( Virtex-4 & Virtex-2

[Grant Likely]

On 4/16/07, Andrei Konovalov <akonovalov@ru.mvista.com> wrote:
> Grant Likely wrote:
> > No, I did not include TEMAC support.  However, I will publish my git
> > tree tomorrow which will include the TEMAC driver.
>
>
> Seems the TEMAC driver is not on your git server yet. Hence the questions.
> Guess this is PLB TEMAC version 3.00a as you wrote auto negotiation is supported.

yup

> Is your driver based on the one by Xilinx (the one from EDK 8.2.02 and the update posted by Rick Moleres)?

Yup, it's just the adapter.c file that Rick posted plus some fixups to
get it to compile in my tree.  Nothing really exciting.  I'm very
interested in the phylib work that you've done.  I hope to take a look
at that in the next day or so.  I'm only publishing my tree as a
convienient starting point for those who need it.

Ideally, I'd like to look at doing a full rewrite so it's in a
condition acceptable for mainline, but I don't have time for that at
the moment.

Cheers,
g.

-- 
Grant Likely, B.Sc. P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195

Re: Mr Grant Likely's New Patches for 2.6 Kernel and Xilinx FPGA ( Virtex-4 & Virtex-2

[Andrei Konovalov]

Grant Likely wrote:
> On 4/16/07, Andrei Konovalov <akonovalov@ru.mvista.com> wrote:
>> Grant Likely wrote:
>> > No, I did not include TEMAC support.  However, I will publish my git
>> > tree tomorrow which will include the TEMAC driver.
>>
>>
>> Seems the TEMAC driver is not on your git server yet. Hence the 
>> questions.
>> Guess this is PLB TEMAC version 3.00a as you wrote auto negotiation is 
>> supported.
> 
> yup
> 
>> Is your driver based on the one by Xilinx (the one from EDK 8.2.02 and 
>> the update posted by Rick Moleres)?
> 
> Yup, it's just the adapter.c file that Rick posted plus some fixups to
> get it to compile in my tree.  Nothing really exciting.  I'm very
> interested in the phylib work that you've done.  I hope to take a look
> at that in the next day or so.

The feedback is very welcome.
Mostly was trying to use what is already in the kernel, and not to reinvent
the wheel.

I wouldn't say I've completely done with it.
Few SGDMA related ioctls to add (should be fairly straightforward).
And to check the advertised capabilities - as I wrote in the previous
posting, it looks like the driver stops advertising 1000Mbits at some
point (after turning auto negotiation off, switching to the lower speeds,
and trying to go back to 1000Mbits).

> I'm only publishing my tree as a
> convienient starting point for those who need it.
> 
> Ideally, I'd like to look at doing a full rewrite so it's in a
> condition acceptable for mainline, but I don't have time for that at
> the moment.

I am not certain if the "linux adapter plus the OS independent code"
could easily be accepted (provided that the OS independent code is
reformatted as much as possible to fit into the community).
Afraid complete rewrite is fairly large effort, and, moreover, so far PLB TEMAC
has been significantly changing from one EDK release to the next. So
one could have to rewrite considerable parts of the driver every EDK release.
Would be nice to reuse the man-hours Xilinx put in their OS indpendent code.

Thanks,
Andrei

> Cheers,
> g.
>