From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from ug-out-1314.google.com (ug-out-1314.google.com [66.249.92.171]) by ozlabs.org (Postfix) with ESMTP id D66FCDDF4D for ; Wed, 25 Apr 2007 00:59:39 +1000 (EST) Received: by ug-out-1314.google.com with SMTP id k3so157312ugf for ; Tue, 24 Apr 2007 07:59:38 -0700 (PDT) Message-ID: <528646bc0704240759g1dd30c68qd518c0fd3aa9ea9f@mail.gmail.com> Date: Tue, 24 Apr 2007 08:59:37 -0600 From: "Grant Likely" Sender: glikely@gmail.com To: "Mohammad Sadegh Sadri" Subject: Re: 2.6 Kernel , Xilinx Virtex and PPC 405 On chip memory controllers ( DSOCM and ISOCM ) In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed References: Cc: linuxppc-embedded@ozlabs.org List-Id: Linux on Embedded PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On 4/24/07, Mohammad Sadegh Sadri wrote: > > > what about the cache? > Does the current kernel use the cache efficiently? Yes, the caches work and are turned on by the kernel. g. -- Grant Likely, B.Sc. P.Eng. Secret Lab Technologies Ltd. grant.likely@secretlab.ca (403) 399-0195