From: "Jon Scully" <jonscully@gmail.com>
To: linuxppc-embedded@ozlabs.org
Subject: Re: MPC8245 reset register
Date: Tue, 5 Sep 2006 17:06:55 -0700 [thread overview]
Message-ID: <53107f6e0609051706i67eac762y114ad03bf2065548@mail.gmail.com> (raw)
In-Reply-To: <198592450609051149h47423ebev9c94eb8aefc2a3fb@mail.gmail.com>
On 9/5/06, Reeve Yang <yang.reeve@gmail.com> wrote:
> I'm kind of curious what's the proper way to reset the
> 8245 CPU? For anyone who doesn't know MPC8245, which is 603e core.
You could starve the watchdog (assuming SWE=1 in SYPCR). If you own
the hardware design, you could add an addressable WO latch (FPGA) that
asserts reset for the right number of clock cycles (what I would
normally provide or ask for in a design -- but *only* during
development). Otherwise... If this is for development purposes,
consider using JTAG (Boundary Scan) to control /SRESET.
(My reference to RST was supposed to be humorous -- as in, remember
the good old days when you could do that in S/W?! ('RST 7' in Z80 &
8085) Sorry for my bad humor.)
next prev parent reply other threads:[~2006-09-06 0:06 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-09-02 22:46 MPC8245 reset register Reeve Yang
2006-09-02 23:47 ` Jon Scully
2006-09-05 18:49 ` Reeve Yang
2006-09-06 0:06 ` Jon Scully [this message]
2006-09-06 0:50 ` Reeve Yang
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