* MPC8245 reset register @ 2006-09-02 22:46 Reeve Yang 2006-09-02 23:47 ` Jon Scully 0 siblings, 1 reply; 5+ messages in thread From: Reeve Yang @ 2006-09-02 22:46 UTC (permalink / raw) To: linuxppc-embedded [-- Attachment #1: Type: text/plain, Size: 186 bytes --] Can anyone tell me which register should I use to do soft reset on MPC8241/5 CPU? I searched its manuall but only find EPIC to send SRESET exception on offset 0x41090. Thanks. - Reeve [-- Attachment #2: Type: text/html, Size: 206 bytes --] ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: MPC8245 reset register 2006-09-02 22:46 MPC8245 reset register Reeve Yang @ 2006-09-02 23:47 ` Jon Scully 2006-09-05 18:49 ` Reeve Yang 0 siblings, 1 reply; 5+ messages in thread From: Jon Scully @ 2006-09-02 23:47 UTC (permalink / raw) To: linuxppc-embedded On 9/2/06, Reeve Yang <yang.reeve@gmail.com> wrote: > Can anyone tell me which register should I use to do soft reset on MPC8241/5 > CPU? I searched its manuall but only find EPIC to send SRESET exception on > offset 0x41090. > > Thanks. > > - Reeve > Use the reset instruction (RST in assembly). ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: MPC8245 reset register 2006-09-02 23:47 ` Jon Scully @ 2006-09-05 18:49 ` Reeve Yang 2006-09-06 0:06 ` Jon Scully 0 siblings, 1 reply; 5+ messages in thread From: Reeve Yang @ 2006-09-05 18:49 UTC (permalink / raw) To: Jon Scully; +Cc: linuxppc-embedded [-- Attachment #1: Type: text/plain, Size: 797 bytes --] Hi Jon, Could you elaborate it a bit? I wrote 0x1 to PI register, but CPU hangs without resetting. I'm kind of curious what's the proper way to reset the 8245 CPU? For anyone who doesn't know MPC8245, which is 603e core. Thanks a lot. - Reeve On 9/2/06, Jon Scully <jonscully@gmail.com> wrote: > > On 9/2/06, Reeve Yang <yang.reeve@gmail.com> wrote: > > Can anyone tell me which register should I use to do soft reset on > MPC8241/5 > > CPU? I searched its manuall but only find EPIC to send SRESET exception > on > > offset 0x41090. > > > > Thanks. > > > > - Reeve > > > > Use the reset instruction (RST in assembly). > _______________________________________________ > Linuxppc-embedded mailing list > Linuxppc-embedded@ozlabs.org > https://ozlabs.org/mailman/listinfo/linuxppc-embedded > [-- Attachment #2: Type: text/html, Size: 1319 bytes --] ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: MPC8245 reset register 2006-09-05 18:49 ` Reeve Yang @ 2006-09-06 0:06 ` Jon Scully 2006-09-06 0:50 ` Reeve Yang 0 siblings, 1 reply; 5+ messages in thread From: Jon Scully @ 2006-09-06 0:06 UTC (permalink / raw) To: linuxppc-embedded On 9/5/06, Reeve Yang <yang.reeve@gmail.com> wrote: > I'm kind of curious what's the proper way to reset the > 8245 CPU? For anyone who doesn't know MPC8245, which is 603e core. You could starve the watchdog (assuming SWE=1 in SYPCR). If you own the hardware design, you could add an addressable WO latch (FPGA) that asserts reset for the right number of clock cycles (what I would normally provide or ask for in a design -- but *only* during development). Otherwise... If this is for development purposes, consider using JTAG (Boundary Scan) to control /SRESET. (My reference to RST was supposed to be humorous -- as in, remember the good old days when you could do that in S/W?! ('RST 7' in Z80 & 8085) Sorry for my bad humor.) ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: MPC8245 reset register 2006-09-06 0:06 ` Jon Scully @ 2006-09-06 0:50 ` Reeve Yang 0 siblings, 0 replies; 5+ messages in thread From: Reeve Yang @ 2006-09-06 0:50 UTC (permalink / raw) To: linuxppc-embedded [-- Attachment #1: Type: text/plain, Size: 1972 bytes --] LoL, my bad not understanding the humor. This becomes an interesting topic. I looked at different CPUs, it seems everyone uses different method to reset itself, and there is no uniformed or easy for 603e. I searched on google but didn't see anyone have similiar concern. Actually lots of boxes/systems using MPC8245, why nobody cares about it? :) To use watchdog timeout, or gpio port to assert reset line on CPU are not flexible enough. If using watchdog, I have to enable watchdog and reduce the timeout length (if it's too long). If using some GPIO device, I'll have to rely on i2c bus or whatever io interface to write data. Acutally our system has RESET by a GPIO(PCA9556) port. Interesting enough, I resolved the problem by writing a data to an invalid address with hoping for a machine check exception (in fact this is what u-boot does). Would it be good to make it as a stardard "restart" function in mpc10x_common.c? If it's acceptable I could send out my patch. - Reeve On 9/6/06, Jon Scully <jonscully@gmail.com> wrote: > > On 9/5/06, Reeve Yang <yang.reeve@gmail.com> wrote: > > I'm kind of curious what's the proper way to reset the > > 8245 CPU? For anyone who doesn't know MPC8245, which is 603e core. > > You could starve the watchdog (assuming SWE=1 in SYPCR). If you own > the hardware design, you could add an addressable WO latch (FPGA) that > asserts reset for the right number of clock cycles (what I would > normally provide or ask for in a design -- but *only* during > development). Otherwise... If this is for development purposes, > consider using JTAG (Boundary Scan) to control /SRESET. > > (My reference to RST was supposed to be humorous -- as in, remember > the good old days when you could do that in S/W?! ('RST 7' in Z80 & > 8085) Sorry for my bad humor.) > _______________________________________________ > Linuxppc-embedded mailing list > Linuxppc-embedded@ozlabs.org > https://ozlabs.org/mailman/listinfo/linuxppc-embedded > [-- Attachment #2: Type: text/html, Size: 2526 bytes --] ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2006-09-06 0:50 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2006-09-02 22:46 MPC8245 reset register Reeve Yang 2006-09-02 23:47 ` Jon Scully 2006-09-05 18:49 ` Reeve Yang 2006-09-06 0:06 ` Jon Scully 2006-09-06 0:50 ` Reeve Yang
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