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From: Alexander Graf <agraf@suse.de>
To: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>,
	benh@kernel.crashing.org, paulus@samba.org
Cc: linuxppc-dev@lists.ozlabs.org, kvm@vger.kernel.org,
	kvm-ppc@vger.kernel.org
Subject: Re: [PATCH 1/4] KVM: PPC: BOOK3S: PR: Emulate virtual timebase register
Date: Mon, 28 Jul 2014 15:25:32 +0200	[thread overview]
Message-ID: <53D64F4C.80208@suse.de> (raw)
In-Reply-To: <874mzyxati.fsf@linux.vnet.ibm.com>


On 06.06.14 18:27, Aneesh Kumar K.V wrote:
> Alexander Graf <agraf@suse.de> writes:
>
>> On 05.06.14 14:08, Aneesh Kumar K.V wrote:
>>> virtual time base register is a per VM, per cpu register that needs
>>> to be saved and restored on vm exit and entry. Writing to VTB is not
>>> allowed in the privileged mode.
>>>
>>> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
>> For some reason BUG() doesn't always trigger the "execution stops here"
>> logic in gcc. So I've squashed this patch into yours.
>>
>>
>> Alex
>>
>>
>> diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
>> index 3e7085d..99de6ad 100644
>> --- a/arch/powerpc/include/asm/reg.h
>> +++ b/arch/powerpc/include/asm/reg.h
>> @@ -1206,6 +1206,7 @@ static inline unsigned long mfvtb (void)
>>         * capture that.
>>         */
>>        BUG();
>> +    return 0;
>>    }
>>
>>    #ifdef __powerpc64__
> you can then drop the include header change. ie,
>
> #include <asm/bug.h>

Yeah, things are even worse than I thought. I've eventually squashed the 
following in. a NOP'ed mfspr() won't keep the branch from blr'ing, so 
we'd never hit the BUG() anyway.


Alex

diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 1f34ef7..c8f3381 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -25,7 +25,6 @@
  #ifdef CONFIG_8xx
  #include <asm/reg_8xx.h>
  #endif /* CONFIG_8xx */
-#include <asm/bug.h>

  #define MSR_SF_LG      63              /* Enable 64 bit mode */
  #define MSR_ISF_LG     61              /* Interrupt 64b mode valid on 
630 */
@@ -1210,12 +1209,6 @@ static inline unsigned long mfvtb (void)
         if (cpu_has_feature(CPU_FTR_ARCH_207S))
                 return mfspr(SPRN_VTB);
  #endif
-       /*
-        * The above mfspr will be a no-op on anything before Power8
-        * That can result in random values returned. We need to
-        * capture that.
-        */
-       BUG();
         return 0;
  }

  reply	other threads:[~2014-07-28 13:25 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-06-05 12:08 KVM: PPC: BOOK3S: PR: P8 Support Aneesh Kumar K.V
2014-06-05 12:08 ` [PATCH 1/4] KVM: PPC: BOOK3S: PR: Emulate virtual timebase register Aneesh Kumar K.V
2014-06-05 12:19   ` Alexander Graf
2014-06-05 15:50     ` Aneesh Kumar K.V
2014-06-05 16:53       ` Alexander Graf
2014-06-05 17:33         ` Aneesh Kumar K.V
2014-06-05 22:32           ` Alexander Graf
2014-06-05 22:36             ` Alexander Graf
2014-06-06 10:44   ` Alexander Graf
2014-06-06 16:27     ` Aneesh Kumar K.V
2014-07-28 13:25       ` Alexander Graf [this message]
2014-07-28 22:59         ` Stewart Smith
2014-06-05 12:08 ` [PATCH 2/4] KVM: PPC: BOOK3S: PR: Doorbell support Aneesh Kumar K.V
2014-06-05 12:21   ` Alexander Graf
2014-06-05 12:23     ` Alexander Graf
2014-06-05 15:55       ` Aneesh Kumar K.V
2014-06-06  9:28     ` Aneesh Kumar K.V
2014-06-05 12:08 ` [PATCH 3/4] KVM: PPC: BOOK3S: PR: Emulate DPDES register Aneesh Kumar K.V
2014-06-05 12:08 ` [PATCH 4/4] KVM: PPC: BOOK3S: PR: Emulate instruction counter Aneesh Kumar K.V
2014-06-06 10:24 ` KVM: PPC: BOOK3S: PR: P8 Support Alexander Graf

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