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Date: Thu, 04 Sep 2014 16:59:58 +0900
From: =?UTF-8?B?TWljaGVsIETDpG56ZXI=?= <michel@daenzer.net>
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To: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Subject: Re: TTM placement & caching issue/questions
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Cc: Alex Deucher <alexander.deucher@amd.com>, linuxppc-dev@ozlabs.org,
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On 04.09.2014 16:59, Michel Dänzer wrote:
> On 04.09.2014 16:54, Benjamin Herrenschmidt wrote:
>> On Thu, 2014-09-04 at 16:19 +0900, Michel Dänzer wrote:
>>>> +#else /* CONFIG_X86 */
>>>> +int ttm_tt_set_placement_caching(struct ttm_tt *ttm, uint32_t
>>> *placement)
>>>> +{
>>>> +     if (*placement & (TTM_PL_TT | TTM_PL_FLAG_SYSTEM)) {
>>>> +             ttm->caching_state = tt_cached;
>>>> +             *placement &= ~TTM_PL_MASK_CACHING;
>>>> +             *placement |= TTM_PL_FLAG_CACHED;
>>>
>>> NAK, this will break AGP on PowerMacs.
>>
>>   ... which doesn't work reliably anyway with DRI2 :-)
>
> Define 'not reliably'. I have uptimes of weeks, and I'm pretty sure I'm
> not alone, at least with AGP 1x it seems to work quite well for most
> people. So I don't see the justification for intentionally breaking it
> completely for all of us.

Even more so because PCI GART is unusably slow in general.


-- 
Earthling Michel Dänzer            |                  http://www.amd.com
Libre software enthusiast          |                Mesa and X developer