From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
To: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Cc: mikey@neuling.org, james.hogan@imgtec.com, avagin@openvz.org,
Paul.Clothier@imgtec.com, davem@davemloft.net,
peterz@infradead.org, palves@redhat.com,
linux-kernel@vger.kernel.org, oleg@redhat.com,
dhowells@redhat.com, linuxppc-dev@ozlabs.org, davej@redhat.com,
akpm@linux-foundation.org, tglx@linutronix.de
Subject: Re: [PATCH V3 3/3] powerpc, ptrace: Enable support for miscellaneous registers
Date: Wed, 08 Oct 2014 21:50:20 +0530 [thread overview]
Message-ID: <54356444.1080702@linux.vnet.ibm.com> (raw)
In-Reply-To: <20140827213559.GB11489@us.ibm.com>
On 08/28/2014 03:05 AM, Sukadev Bhattiprolu wrote:
>
> Anshuman Khandual [khandual@linux.vnet.ibm.com] wrote:
> | This patch enables get and set of miscellaneous registers through ptrace
> | PTRACE_GETREGSET/PTRACE_SETREGSET interface by implementing new powerpc
> | specific register set REGSET_MISC support corresponding to the new ELF
> | core note NT_PPC_MISC added previously in this regard.
> |
> | Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
> | ---
> | arch/powerpc/kernel/ptrace.c | 81 ++++++++++++++++++++++++++++++++++++++++++++
> | 1 file changed, 81 insertions(+)
> |
> | diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
> | index 17642ef..63b883a 100644
> | --- a/arch/powerpc/kernel/ptrace.c
> | +++ b/arch/powerpc/kernel/ptrace.c
> | @@ -1149,6 +1149,76 @@ static int tm_cvmx_set(struct task_struct *target, const struct user_regset *reg
> | #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
> |
> | /*
> | + * Miscellaneous Registers
> | + *
> | + * struct {
> | + * unsigned long dscr;
> | + * unsigned long ppr;
> | + * unsigned long tar;
> | + * };
> | + */
> | +static int misc_get(struct task_struct *target, const struct user_regset *regset,
> | + unsigned int pos, unsigned int count,
> | + void *kbuf, void __user *ubuf)
> | +{
> | + int ret;
> | +
> | + /* DSCR register */
> | + ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
> | + &target->thread.dscr, 0,
> | + sizeof(unsigned long));
> | +
> | + BUILD_BUG_ON(offsetof(struct thread_struct, dscr) + sizeof(unsigned long) +
> | + sizeof(unsigned long) != offsetof(struct thread_struct, ppr));
>
>
> I see these in arch/powerpc/include/asm/processor.h
>
> #ifdef CONFIG_PPC64
> unsigned long dscr;
> int dscr_inherit;
> unsigned long ppr; /* used to save/restore SMT priority */
> #endif
>
> where there is an 'int' between ppr and dscr. So, should one of
> the above sizeof(unsigned long) be changed to sizeof(int) ?
Right, I understand that but strangely I get this compile time error
when it is changed to sizeof(int).
error: call to ‘__compiletime_assert_1350’ declared with attribute error:
BUILD_BUG_ON failed: TSO(dscr) + sizeof(unsigned long) + sizeof(int) != TSO(ppr)
BUILD_BUG_ON(TSO(dscr) + sizeof(unsigned long) + sizeof(int) != TSO(ppr));
may be I am missing something here.
>
> Also, since we use offsetof(struct thread_struct, field) heavily, a
> macro local to the file, may simplify the code.
Right, will do that.
> #define TSO(f) (offsetof(struct thread_struct, f))
>
> | +
> | + /* PPR register */
> | + if (!ret)
> | + ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
> | + &target->thread.ppr, sizeof(unsigned long),
> | + 2 * sizeof(unsigned long));
> | +
> | + BUILD_BUG_ON(offsetof(struct thread_struct, ppr) + sizeof(unsigned long)
> | + != offsetof(struct thread_struct, tar));
> | + /* TAR register */
> | + if (!ret)
> | + ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
> | + &target->thread.tar, 2 * sizeof(unsigned long),
> | + 3 * sizeof(unsigned long));
> | + return ret;
> | +}
> | +
> | +static int misc_set(struct task_struct *target, const struct user_regset *regset,
> | + unsigned int pos, unsigned int count,
> | + const void *kbuf, const void __user *ubuf)
> | +{
> | + int ret;
> | +
> | + /* DSCR register */
> | + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
> | + &target->thread.dscr, 0,
> | + sizeof(unsigned long));
> | +
> | + BUILD_BUG_ON(offsetof(struct thread_struct, dscr) + sizeof(unsigned long) +
> | + sizeof(unsigned long) != offsetof(struct thread_struct, ppr));
> | +
> | + /* PPR register */
> | + if (!ret)
> | + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
> | + &target->thread.ppr, sizeof(unsigned long),
> | + 2 * sizeof(unsigned long));
> | +
> | + BUILD_BUG_ON(offsetof(struct thread_struct, ppr) + sizeof(unsigned long)
> | + != offsetof(struct thread_struct, tar));
> | +
> | + /* TAR register */
> | + if (!ret)
> | + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
> | + &target->thread.tar, 2 * sizeof(unsigned long),
> | + 3 * sizeof(unsigned long));
> | + return ret;
> | +}
> | +
> | +/*
> | * These are our native regset flavors.
> | */
> | enum powerpc_regset {
> | @@ -1169,6 +1239,7 @@ enum powerpc_regset {
> | REGSET_TM_CFPR, /* TM checkpointed FPR */
> | REGSET_TM_CVMX, /* TM checkpointed VMX */
> | #endif
> | + REGSET_MISC /* Miscellaneous */
> | };
> |
> | static const struct user_regset native_regsets[] = {
> | @@ -1225,6 +1296,11 @@ static const struct user_regset native_regsets[] = {
> | .active = tm_cvmx_active, .get = tm_cvmx_get, .set = tm_cvmx_set
> | },
> | #endif
> | + [REGSET_MISC] = {
> | + .core_note_type = NT_PPC_MISC, .n = 3,
> | + .size = sizeof(u64), .align = sizeof(u64),
> | + .get = misc_get, .set = misc_set
> | + },
> | };
> |
> | static const struct user_regset_view user_ppc_native_view = {
> | @@ -1566,6 +1642,11 @@ static const struct user_regset compat_regsets[] = {
> | .active = tm_cvmx_active, .get = tm_cvmx_get, .set = tm_cvmx_set
> | },
> | #endif
> | + [REGSET_MISC] = {
> | + .core_note_type = NT_PPC_MISC, .n = 3,
> | + .size = sizeof(u64), .align = sizeof(u64),
> | + .get = misc_get, .set = misc_set
> | + },
>
> Since the .n = 3 is used more than once, how about a macro for the
> number of misc registers ?
Will add it as well. Thanks !
next prev parent reply other threads:[~2014-10-08 16:20 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-23 15:15 [PATCH V3 0/3] Add new PowerPC specific ELF core notes Anshuman Khandual
2014-05-23 15:15 ` [PATCH V3 1/3] elf: Add some new PowerPC specifc note sections Anshuman Khandual
2014-05-23 15:15 ` [PATCH V3 2/3] powerpc, ptrace: Enable support for transactional memory register sets Anshuman Khandual
2014-07-24 6:56 ` Sam Bobroff
2014-08-27 21:35 ` Sukadev Bhattiprolu
2014-10-09 5:04 ` Anshuman Khandual
2014-05-23 15:15 ` [PATCH V3 3/3] powerpc, ptrace: Enable support for miscellaneous registers Anshuman Khandual
2014-08-27 21:35 ` Sukadev Bhattiprolu
2014-10-08 16:20 ` Anshuman Khandual [this message]
2014-10-08 17:16 ` Sukadev Bhattiprolu
2014-06-12 9:09 ` [PATCH V3 0/3] Add new PowerPC specific ELF core notes Anshuman Khandual
2014-07-17 10:27 ` Anshuman Khandual
2014-07-17 11:09 ` Benjamin Herrenschmidt
2014-07-17 11:14 ` Michael Neuling
2014-07-17 23:23 ` Sam Bobroff
2014-07-18 8:13 ` Anshuman Khandual
2014-07-24 6:52 ` Sam Bobroff
2014-10-07 12:35 ` Anshuman Khandual
2014-09-11 6:14 ` Anshuman Khandual
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