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Date: Mon, 27 Oct 2014 11:50:00 +0530
From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
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To: linuxppc-dev@ozlabs.org
Subject: Re: [PATCH V3] powerpc, xmon: Enable HW instruction breakpoint on
 POWER8
References: <1412855321-21276-1-git-send-email-khandual@linux.vnet.ibm.com>
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Cc: Michael Ellerman <michael@ellerman.id.au>
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On 10/09/2014 05:18 PM, Anshuman Khandual wrote:
> This patch enables support for hardware instruction breakpoints
> on POWER8 with the help of a new register CIABR (Completed
> Instruction Address Breakpoint Register). With this patch, single
> hardware instruction breakpoint can be added and cleared during
> any active xmon debug session. This hardware based instruction
> breakpoint mechanism works correctly along with the existing TRAP
> based instruction breakpoints available on xmon.

Hey Michael,

Any updates on this patch ?